Applying autonomic principles for workload management in multi-core systems on chip

Johannes Zeppenfeld, Andreas Herkersdorf

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

15 Scopus citations

Abstract

This paper explores various possibilities for autonomic enhancements to a multi-core network processor system on chip. Based on the autonomic system on chip paradigm, it is shown how monitors can be added to quantify the operating state of a typical processor core, whereupon a learning classifier system evaluator can determine appropriate actions to be performed in order to optimize the frequency and task distribution across the system. A hardware prototype is used to demonstrate the feasibility of autonomic concepts for dynamic component parameterization and task management at run time.

Original languageEnglish
Title of host publicationProceedings of the 8th ACM International Conference on Autonomic Computing, ICAC 2011 and Co-located Workshops
Pages3-10
Number of pages8
DOIs
StatePublished - 2011
Event8th ACM International Conference on Autonomic Computing, ICAC 2011 and Co-located Workshops - Karlsruhe, Germany
Duration: 14 Jun 201118 Jun 2011

Publication series

NameProceedings of the 8th ACM International Conference on Autonomic Computing, ICAC 2011 and Co-located Workshops

Conference

Conference8th ACM International Conference on Autonomic Computing, ICAC 2011 and Co-located Workshops
Country/TerritoryGermany
CityKarlsruhe
Period14/06/1118/06/11

Keywords

  • autonomic
  • multi-core
  • system-on-chip

Fingerprint

Dive into the research topics of 'Applying autonomic principles for workload management in multi-core systems on chip'. Together they form a unique fingerprint.

Cite this