Abstract
The rapid push towards the minimization of the feature sizes of the process technology nodes in the nano-CMOS era has significantly increased the power densities and made State-of-the-Art FPGAs vulnerable to diverse problems induced by excessive temperatures. As a result, there is a prominent need to accurately study the FPGA thermal characteristics. Our experimental setup employs a thermal camera that captures the infrared emissions from the silicon wafer of an FPGA die allowing us to evaluate the accuracy of the methods conventionally used for thermal analysis, such as thermal simulations. Based on our observation that the memory interface is the thermal hotspot of an FPGA-based embedded system, we demonstrate that the cache plays a dominant thermal role by reducing memory accesses; we carefully examine the influence of various cache parameters on the FPGA temperature and propose a model linking these quantities, with an average maximum error of only 0.64°C.
Original language | English |
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DOIs | |
State | Published - 2013 |
Externally published | Yes |
Event | 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Porto, Portugal Duration: 2 Sep 2013 → 4 Sep 2013 |
Conference
Conference | 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 |
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Country/Territory | Portugal |
City | Porto |
Period | 2/09/13 → 4/09/13 |