TY - GEN
T1 - Analog/Mixed-Signal Standard Cell Based Approach for Automated Circuit Generation of Neural Network Accelerators
AU - Muller, Roland
AU - Mateu, Loreto
AU - Brederlow, Ralf
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - Analog and mixed-signal neural network accelerators are a promising solution to apply deep learning methods to edge applications where high energy and area efficiency are required. Such in-memory computing implementations use regular and repetitive circuit structures that take great advantage of design automation. An analog/mixed-signal standard cell design approach in combination with an automation framework has been developed to ease the design of such systems. The framework discussed here provides the basic functionality such as schematic and layout creation. It is based on manually designed standard cells and technology and topology parameters to steer the automation. The presented methodology drastically reduces the (re-)design time and engineering effort leading to a reduced time-to-market whilst errors occurring in manual executed circuit design can be avoided.
AB - Analog and mixed-signal neural network accelerators are a promising solution to apply deep learning methods to edge applications where high energy and area efficiency are required. Such in-memory computing implementations use regular and repetitive circuit structures that take great advantage of design automation. An analog/mixed-signal standard cell design approach in combination with an automation framework has been developed to ease the design of such systems. The framework discussed here provides the basic functionality such as schematic and layout creation. It is based on manually designed standard cells and technology and topology parameters to steer the automation. The presented methodology drastically reduces the (re-)design time and engineering effort leading to a reduced time-to-market whilst errors occurring in manual executed circuit design can be avoided.
KW - AI accelerators
KW - Electronic design automation
KW - analog computing
KW - analog/mixed-signal circuits
KW - integrated circuits
KW - neuromorphic computing
KW - neuromorphic hardware
UR - http://www.scopus.com/inward/record.url?scp=85181537260&partnerID=8YFLogxK
U2 - 10.1109/DCIS58620.2023.10335979
DO - 10.1109/DCIS58620.2023.10335979
M3 - Conference contribution
AN - SCOPUS:85181537260
T3 - 2023 38th Conference on Design of Circuits and Integrated Systems, DCIS 2023
BT - 2023 38th Conference on Design of Circuits and Integrated Systems, DCIS 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 38th Conference on Design of Circuits and Integrated Systems, DCIS 2023
Y2 - 15 November 2023 through 17 November 2023
ER -