Analog design challenges and trade-offs using emerging materials and devices

M. Fulde, A. Mercha, C. Gustin, B. Parvais, V. Subramanian, K. V. Arnim, F. Bauer, K. Schruefer, D. Schmitt-Landsiedel, G. Knoblingert

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

8 Scopus citations

Abstract

Analog device figures-of-merit change significantly with the introduction of advanced materials and devices such as high-k or Multiple-Gate FETs. Measurements show enhanced intrinsic gain and matching behavior for MuGFETs which help to reduce area and power consumption in analog circuits. However, high-k degrades matching, flicker noise and VT stability. Measured device performance is used to simulate the impact of these trends on circuit design trade-offs. Migrating from SiON to HfO2 dielectric approximately doubles area and power consumption to keep matching and noise performance constant. Transient VT instabilities in the range of 10mV can degrade the resolution of analog-to-digital converters by more than one bit. The use of non-binary ADCs is proposed to overcome these issues.

Original languageEnglish
Title of host publicationESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages123-126
Number of pages4
ISBN (Print)1424411254, 9781424411252
DOIs
StatePublished - 2007
EventESSCIRC 2007 - 33rd European Solid-State Circuits Conference - Munich, Germany
Duration: 11 Sep 200713 Sep 2007

Publication series

NameESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference

Conference

ConferenceESSCIRC 2007 - 33rd European Solid-State Circuits Conference
Country/TerritoryGermany
CityMunich
Period11/09/0713/09/07

Fingerprint

Dive into the research topics of 'Analog design challenges and trade-offs using emerging materials and devices'. Together they form a unique fingerprint.

Cite this