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Aging analysis at gate and macro cell level

  • Technical University of Munich

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

48 Scopus citations

Abstract

Aging, which can be regarded as a timedependent variability, has until recently not received much attention in the field of electronic design automation. This is changing because increasing reliability costs threaten the continued scaling of ICs. We investigate the impact of aging effects on single combinatorial gates and present methods that help to reduce the reliability costs by accurately analyzing the performance degradation of aged circuits at gate and macro cell level.

Original languageEnglish
Title of host publication2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages77-84
Number of pages8
ISBN (Print)9781424481927
DOIs
StatePublished - 2010
Event2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010 - San Jose, United States
Duration: 7 Nov 201011 Nov 2010

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISSN (Print)1092-3152

Conference

Conference2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010
Country/TerritoryUnited States
CitySan Jose
Period7/11/1011/11/10

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