Admittance properties of thin/thick metal-oxide-semiconductor structures. II. Exact modeling by two-dimensional simulation

In the foregoing part of this article, the admittance characteristics of stepped oxide structures have been discussed using an equivalent network analysis. This approach proves to work satisfactorily as long as the thin/thick oxide thickness ratio is sufficiently large (≥0.3 typically); however, it seems to become increasingly problematic when this ratio tends to assume smaller values. Since we guessed that the discrepancies were caused by two-dimensional effects, exact two-dimensional admittance simulations have been performed to clarify the situation. These calculations allow a detailed interpretation of the individual C(V) features in terms of the spatial distribution of the charge carriers in the interior of the device under test. They largely justify the equivalent network, but also indicate the shortcomings introduced by this approach.