TY - GEN
T1 - Adder circuits with transistors using independently controlled gates
AU - Weis, Marcus
AU - Pfitzner, Andrzej
AU - Kasprowicz, Dominik
AU - Emling, Rainer
AU - Maly, Wojciech
AU - Schmitt-Landsiedel, Doris
PY - 2009
Y1 - 2009
N2 - Circuits with transistors using independently controlled gates have been proposed to reduce the number of transistors and to increase the logic density per area. So far only small building blocks have been presented. This paper investigates for the first time the use of independent double gate transistors in 16 bit ripple carry and parallel prefix adders. New adder circuits and the trade-off between area reduction, delay and power consumption are presented. Area and transistor count reduction by one third can be achieved.
AB - Circuits with transistors using independently controlled gates have been proposed to reduce the number of transistors and to increase the logic density per area. So far only small building blocks have been presented. This paper investigates for the first time the use of independent double gate transistors in 16 bit ripple carry and parallel prefix adders. New adder circuits and the trade-off between area reduction, delay and power consumption are presented. Area and transistor count reduction by one third can be achieved.
UR - http://www.scopus.com/inward/record.url?scp=70350141754&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2009.5117782
DO - 10.1109/ISCAS.2009.5117782
M3 - Conference contribution
AN - SCOPUS:70350141754
SN - 9781424438280
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 449
EP - 452
BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Y2 - 24 May 2009 through 27 May 2009
ER -