A Universal Specification Methodology for Quality Ensured, Highly Automated Generation of Design Models

Code generation is a promising solution to the increasing complexity of designing and verifying modern hardware systems. However, applying code generators also introduces two difficulties. First, efficient code generation requires a uniform specification format, allowing the reuse of generators on compliant system specifications. Second, the generation workflow must include additional quality control measures to ensure industrial-strength designs. We propose a methodology comprising the Universal Specification Format (USF) and a metamodeling-based generator framework to address these challenges. USF models general hardware systems by their function set and accessible state. Our code generation framework uses USF to create three design and verification artifacts: (i) simulation models to validate the specification, (ii) the synthesizable hardware design, and (iii) formal properties to verify that the design matches the specification. Since all generators read a common system specification, we present measures and precautions to ensure independent design and properties generation. Our evaluation demonstrates that the proposed USF methodology shifts focus from creating multiple design artifacts to creating a single formal system specification. As a result, we observe a noticeable reduction in development effort due to applying highly reusable code generators to USF specifications.