TY - GEN
T1 - A scheduling framework for handling integrated modular avionic systems on multicore platforms
AU - Melani, Alessandra
AU - Mancuso, Renato
AU - Caccamo, Marco
AU - Buttazzo, Giorgio
AU - Freitag, Johannes
AU - Uhrig, Sascha
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/9/19
Y1 - 2017/9/19
N2 - Although multicore chips are quickly replacing uniprocessor ones, safety-critical embedded systems are still developed using single processor architecture. The reasons mainly concern predictability and certification issues. This paper proposes a scheduling framework for handling Integrated Modular Avionics (IMA) on multicore platforms providing predictability as well as flexibility in managing dynamic load conditions and unexpected temporal misbehaviors of multicore. A new computational model is proposed to allow specifying a higher degree of flexibility and minimum performance requirements. Schedulability analysis is derived for providing off-line guarantees of real-time constraints in worst-case scenarios, and an efficient reclaiming mechanism is proposed to improve the average-case performance. Simulation and experimental results are reported to validate the proposed approach.
AB - Although multicore chips are quickly replacing uniprocessor ones, safety-critical embedded systems are still developed using single processor architecture. The reasons mainly concern predictability and certification issues. This paper proposes a scheduling framework for handling Integrated Modular Avionics (IMA) on multicore platforms providing predictability as well as flexibility in managing dynamic load conditions and unexpected temporal misbehaviors of multicore. A new computational model is proposed to allow specifying a higher degree of flexibility and minimum performance requirements. Schedulability analysis is derived for providing off-line guarantees of real-time constraints in worst-case scenarios, and an efficient reclaiming mechanism is proposed to improve the average-case performance. Simulation and experimental results are reported to validate the proposed approach.
UR - http://www.scopus.com/inward/record.url?scp=85032738992&partnerID=8YFLogxK
U2 - 10.1109/RTCSA.2017.8046314
DO - 10.1109/RTCSA.2017.8046314
M3 - Conference contribution
AN - SCOPUS:85032738992
T3 - RTCSA 2017 - 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
BT - RTCSA 2017 - 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2017
Y2 - 16 August 2017 through 18 August 2017
ER -