@inproceedings{2673070696494a0a9974f3dc3beaff8d,
title = "A Reading Method for 2T2R RRAM Arrays Coding their Multiple States",
abstract = "Resistive random-access memory (RRAM) devices have been frequently mentioned considering their robust performances. The conventional transistor one-memristor (1TIR) RRAM device becomes less competitive considering its multi- level operation. This paper introduces a two-transistor two- memristor (2T2 R) structure as well as a reading method for the configuration. The designed sense circuit based on a Strong-Arm latch codes 9 different states with 6 bits in 48ns and consumes a power of 7.6uW and it also demonstrates a tolerance to RRAM technologies and variations.",
keywords = "1TIR, 2T2R, RRAM device, Strong-Arm latch, multi-level, reading method",
author = "Running Guo and Stefan Pechmann and Amelie Hagelauer",
note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 67th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2024 ; Conference date: 11-08-2024 Through 14-08-2024",
year = "2024",
doi = "10.1109/MWSCAS60917.2024.10658733",
language = "English",
series = "Midwest Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "157--161",
booktitle = "2024 IEEE 67th International Midwest Symposium on Circuits and Systems, MWSCAS 2024",
}