A programmable stream processing engine for packet manipulation in network processors

Michael Meitinger; Rainer Ohlendorf; Thomas Wild; Andreas Herkersdorf

doi:10.1109/ISVLSI.2007.16

A programmable stream processing engine for packet manipulation in network processors

Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf

Chair of Integrated Systems

Technical University of Munich

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

7 Scopus citations

Abstract

In this paper we introduce a programmable stream processing engine working as a co-processor in a Network Processor egress path. By using a special pipelining architecture several generic manipulations can be performed on-the-fly on a packet data stream with line-speed. In two measurement scenarios for IP forwarding and IP tunneling we demonstrate the benefits of the Post-Processor concept compared to a pure software reference implementation.

Original language	English
Title of host publication	Proceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publication	Emerging VLSI Technologies and Architectures
Pages	259-264
Number of pages	6
DOIs	https://doi.org/10.1109/ISVLSI.2007.16
State	Published - 2007
Event	IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07 - Porto Alegre, Brazil Duration: 9 Mar 2007 → 11 Mar 2007

Publication series

Name	Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures

Conference

Conference	IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07
Country/Territory	Brazil
City	Porto Alegre
Period	9/03/07 → 11/03/07

Access to Document

10.1109/ISVLSI.2007.16

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Meitinger, M., Ohlendorf, R., Wild, T., & Herkersdorf, A. (2007). A programmable stream processing engine for packet manipulation in network processors. In Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (pp. 259-264). Article 4208925 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures). https://doi.org/10.1109/ISVLSI.2007.16

Meitinger, Michael ; Ohlendorf, Rainer ; Wild, Thomas et al. / A programmable stream processing engine for packet manipulation in network processors. Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures. 2007. pp. 259-264 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures).

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title = "A programmable stream processing engine for packet manipulation in network processors",

abstract = "In this paper we introduce a programmable stream processing engine working as a co-processor in a Network Processor egress path. By using a special pipelining architecture several generic manipulations can be performed on-the-fly on a packet data stream with line-speed. In two measurement scenarios for IP forwarding and IP tunneling we demonstrate the benefits of the Post-Processor concept compared to a pure software reference implementation.",

author = "Michael Meitinger and Rainer Ohlendorf and Thomas Wild and Andreas Herkersdorf",

year = "2007",

doi = "10.1109/ISVLSI.2007.16",

language = "English",

isbn = "0769528961",

series = "Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures",

pages = "259--264",

booktitle = "Proceedings - IEEE Computer Society Annual Symposium on VLSI",

note = "IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07 ; Conference date: 09-03-2007 Through 11-03-2007",

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Meitinger, M, Ohlendorf, R, Wild, T & Herkersdorf, A 2007, A programmable stream processing engine for packet manipulation in network processors. in Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures., 4208925, Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, pp. 259-264, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07, Porto Alegre, Brazil, 9/03/07. https://doi.org/10.1109/ISVLSI.2007.16

A programmable stream processing engine for packet manipulation in network processors. / Meitinger, Michael; Ohlendorf, Rainer; Wild, Thomas et al.
Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures. 2007. p. 259-264 4208925 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Meitinger M, Ohlendorf R, Wild T, Herkersdorf A. A programmable stream processing engine for packet manipulation in network processors. In Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures. 2007. p. 259-264. 4208925. (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures). doi: 10.1109/ISVLSI.2007.16

A programmable stream processing engine for packet manipulation in network processors

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