Abstract
This article presents a comprehensive physics-based model for back-end-of-line (BEOL)-compa-tible oxide–semiconductor-based ferroelectric field-effect transistors (FeFETs). The proposed model describes the polarization switching behavior and enables bidirectional bias sweeps for the hysteretic <inline-formula> <tex-math notation="LaTeX">$\textit{I}_{\textit{D}}\textit{V}_{\textit{G}}$</tex-math> </inline-formula> curve. The model has been validated against a TCAD model as well as experimental results. Simulations using the proposed model show that polarization switching during the erase operation is primarily influenced by the fringing field in the absence of holes in the amorphous channel. Furthermore, the memory window (MW) increases as the channel length decreases, which is attributed to the enhanced influence of the fringing field in shorter channel devices, resulting in a larger portion of negative polarization being switched during the erase operation. Simulations using this model suggest an MW of 1.2 V, which shows excellent agreement with experimental data.
Original language | English |
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Pages (from-to) | 1-6 |
Number of pages | 6 |
Journal | IEEE Transactions on Electron Devices |
DOIs | |
State | Accepted/In press - 2024 |
Keywords
- Back-end-of-line (BEOL) ferroelectric field-effect transistor (FeFET)
- Computational modeling
- device modeling
- FeFETs
- ferroelectric (FE) memory
- Iron
- Mathematical models
- monolithic 3-D (M3D)
- Numerical models
- oxide– semiconductor
- Semiconductor device modeling
- Switches