TY - GEN
T1 - A low-overhead monitoring ring interconnect for MPSoC parameter optimization
AU - Bouajila, Abdelmajid
AU - Lakhtel, Abdallah
AU - Zeppenfeld, Johannes
AU - Stechele, Walter
AU - Herkersdorf, Andreas
PY - 2012
Y1 - 2012
N2 - MPSoCs need to integrate self-x properties in order to get rid of the worst-case design style which is no longer affordable in large SoCs. Integrating self-x properties in SoCs is possible through a monitoring interconnect which carries monitor information to evaluators that decide on actions that will tune the SoC operation mode.We have designed a customized interconnect for SoC monitoring/actuation. We have implemented it in VHDL and tested it in FPGA. The prototype proved that this customized interconnect provides good results regarding latency and area overheads and is a key component in enabling self-optimization in our FPGA MPSoC prototype.
AB - MPSoCs need to integrate self-x properties in order to get rid of the worst-case design style which is no longer affordable in large SoCs. Integrating self-x properties in SoCs is possible through a monitoring interconnect which carries monitor information to evaluators that decide on actions that will tune the SoC operation mode.We have designed a customized interconnect for SoC monitoring/actuation. We have implemented it in VHDL and tested it in FPGA. The prototype proved that this customized interconnect provides good results regarding latency and area overheads and is a key component in enabling self-optimization in our FPGA MPSoC prototype.
UR - http://www.scopus.com/inward/record.url?scp=84864366344&partnerID=8YFLogxK
U2 - 10.1109/DDECS.2012.6219023
DO - 10.1109/DDECS.2012.6219023
M3 - Conference contribution
AN - SCOPUS:84864366344
SN - 9781467311854
T3 - Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012
SP - 46
EP - 49
BT - Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012
T2 - 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012
Y2 - 18 April 2012 through 20 April 2012
ER -