A highly linear and efficient 28 GHz stacked power amplifier for 5G using analog predistortion in a 130 nm BiCMOS process

Julian Potschka, Marco Dietz, Katharina Kolb, Tim Maiwald, Sascha Breun, Thomas Ackermann, Dieter Ferling, Amelie Hagelauer, Robert Weigel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

In this paper a highly linear, analog predistorted 28 GHz stacked power amplifier (PA) for 5G is presented. A 130 nm BiCMOS process is used for the circuit realization. The usage of a diode predistorter for analog predistortion is investigated for the stacked PA design and compared to a circuit without predistortion. It is shown, that the linearity of the stacked PA is significantly improved compared to a conventional biasing topology at almost no additional layout size. The measurement shows an overall large signal gain of 14.6 dB and the simulated power added efficiency (PAE) reaches 26 %. The circuit yields a measured input-referred 1 dB compression point (P1dB) of 1.5 dBm. Hence, the amplifier is able to provide 16 dBm output power at PDC=40mW. The simulated circuit performance fits well with the measured results.

Original languageEnglish
Title of host publicationProceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages920-922
Number of pages3
ISBN (Electronic)9781728135175
DOIs
StatePublished - Dec 2019
Externally publishedYes
Event2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 - Singapore, Singapore
Duration: 10 Dec 201913 Dec 2019

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
Volume2019-December

Conference

Conference2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
Country/TerritorySingapore
CitySingapore
Period10/12/1913/12/19

Keywords

  • 5G
  • Analog predistortion
  • Power amplifier

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