TY - GEN
T1 - A heterogeneous microkernel OS for Rack-Scale systems
AU - Hille, Matthias
AU - Asmussen, Nils
AU - Härtig, Hermann
AU - Bhatotia, Pramod
N1 - Publisher Copyright:
© 2020 ACM.
PY - 2020/8/24
Y1 - 2020/8/24
N2 - Datacenters are adopting heterogeneous hardware in the form of different CPU ISAs and accelerators. Advances in low-latency and high-bandwidth interconnects enable hardware vendors to tighten the coupling of multiple CPU servers and accelerators. The closer connection of components facilitates bigger machines, which pose a new challenge to operating systems. We advocate to build a heterogeneous OS for large heterogeneous systems by combining multiple OS design principles to leverage the benefits of each design. Because a security-oriented design, enabled by simplicity and clear encapsulation, is vital in datacenters, we choose to survey various design principles found in microkernel-based systems. We explain that heterogeneous hardware employs different mechanisms to enforce access rights, for example for memory accesses or communication channels. We outline a way to combine enforcement mechanisms of CPUs and accelerators in one system. A consequence of this is a heterogeneous access rights management which is implemented as a heterogeneous capability system in a microkernel-based OS.
AB - Datacenters are adopting heterogeneous hardware in the form of different CPU ISAs and accelerators. Advances in low-latency and high-bandwidth interconnects enable hardware vendors to tighten the coupling of multiple CPU servers and accelerators. The closer connection of components facilitates bigger machines, which pose a new challenge to operating systems. We advocate to build a heterogeneous OS for large heterogeneous systems by combining multiple OS design principles to leverage the benefits of each design. Because a security-oriented design, enabled by simplicity and clear encapsulation, is vital in datacenters, we choose to survey various design principles found in microkernel-based systems. We explain that heterogeneous hardware employs different mechanisms to enforce access rights, for example for memory accesses or communication channels. We outline a way to combine enforcement mechanisms of CPUs and accelerators in one system. A consequence of this is a heterogeneous access rights management which is implemented as a heterogeneous capability system in a microkernel-based OS.
UR - http://www.scopus.com/inward/record.url?scp=85092201623&partnerID=8YFLogxK
U2 - 10.1145/3409963.3410487
DO - 10.1145/3409963.3410487
M3 - Conference contribution
AN - SCOPUS:85092201623
T3 - APSys 2020 - Proceedings of the 2020 ACM SIGOPS Asia-Pacific Workshop on Systems
SP - 50
EP - 58
BT - APSys 2020 - Proceedings of the 2020 ACM SIGOPS Asia-Pacific Workshop on Systems
PB - Association for Computing Machinery
T2 - 11th ACM SIGOPS Asia-Pacific Workshop on Systems, APSys 2020
Y2 - 24 August 2020 through 25 August 2020
ER -