Abstract
We present a framework (real-time calculus) for analysing various system properties pertaining to timing analysis, loads on various components and on-chip buffer memory requirements of heterogeneous platform-based architectures, in a single coherent way. Many previous analysis techniques from the real-time systems domain, which are based on standard event models, turn out to be special cases of our framework. We illustrate this using various realistic examples.
Original language | English |
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Article number | 1253607 |
Pages (from-to) | 190-195 |
Number of pages | 6 |
Journal | Proceedings -Design, Automation and Test in Europe, DATE |
DOIs | |
State | Published - 2003 |
Externally published | Yes |
Event | Design, Automation and Test in Europe Conference and Exhibition, DATE 2003 - Munich, Germany Duration: 3 Mar 2003 → 7 Mar 2003 |