A fast method for identifying matching-relevant transistor pairs

F. Schenkel; M. Pronath; H. Graeb; K. Antreich

A fast method for identifying matching-relevant transistor pairs

F. Schenkel
, M. Pronath
, H. Graeb
, K. Antreich

Chair of Electronic Design Automation

Technical University of Munich

Research output: Contribution to journal › Conference article › peer-review

10 Scopus citations

Abstract

This paper presents a new method to identify mismatch-relevant transistor pairs on the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The presented results show the efficiency and effectiveness of the method.

Original language	English
Pages (from-to)	361-364
Number of pages	4
Journal	Proceedings of the Custom Integrated Circuits Conference
State	Published - 2001
Event	IEEE 2001 Custom Integrated Circuits Conference - San Diego, CA, United States Duration: 6 May 2001 → 9 May 2001

Cite this

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title = "A fast method for identifying matching-relevant transistor pairs",

abstract = "This paper presents a new method to identify mismatch-relevant transistor pairs on the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The presented results show the efficiency and effectiveness of the method.",

author = "F. Schenkel and M. Pronath and H. Graeb and K. Antreich",

year = "2001",

language = "English",

pages = "361--364",

journal = "Proceedings of the Custom Integrated Circuits Conference",

issn = "0886-5930",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE 2001 Custom Integrated Circuits Conference ; Conference date: 06-05-2001 Through 09-05-2001",

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TY - JOUR

T1 - A fast method for identifying matching-relevant transistor pairs

AU - Schenkel, F.

AU - Pronath, M.

AU - Graeb, H.

AU - Antreich, K.

PY - 2001

Y1 - 2001

N2 - This paper presents a new method to identify mismatch-relevant transistor pairs on the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The presented results show the efficiency and effectiveness of the method.

AB - This paper presents a new method to identify mismatch-relevant transistor pairs on the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The presented results show the efficiency and effectiveness of the method.

UR - https://www.scopus.com/pages/publications/0034833075

M3 - Conference article

AN - SCOPUS:0034833075

SN - 0886-5930

SP - 361

EP - 364

JO - Proceedings of the Custom Integrated Circuits Conference

JF - Proceedings of the Custom Integrated Circuits Conference

T2 - IEEE 2001 Custom Integrated Circuits Conference

Y2 - 6 May 2001 through 9 May 2001

ER -

A fast method for identifying matching-relevant transistor pairs

Abstract

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