TY - GEN
T1 - A Digital Adjustable Fully Integrated Bistatic Interferometric Radar Transceiver at 60 GHz in a 130 nm BiCMOS Technology
AU - Voelkel, M.
AU - Dietz, M.
AU - Hagelauer, A.
AU - Hussein, E. M.
AU - Kissinger, D.
AU - Weigel, R.
N1 - Publisher Copyright:
© 2019 European Microwave Association (EuMA).
PY - 2019/9
Y1 - 2019/9
N2 - In this paper a 60 GHz monolithic bistatic interferometric radar transceiver for high precision measuring is presented. The integrated transceiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a LNA, a passive six-port structure, detectors, multiplier, multiplexer, power amplifier and a digital interface. The chip has a size of 2330 μm x 1360 μm and a maximum power consumption of 533 mW from a 3.3 V power supply. The circuit provides two frequency inputs of 7.5 and 15 GHz and multiplies them up to 60 GHz at a minimum input power of -20 dBm. The chip delivers a maximum output power of 9 dBm at 61 GHz. The input path is selectable and the output power is adjustable by a digital interface between -23 and 9 dBm at 60 GHz. Also the reference input power of the six-port and the RF input power can be adjusted in a range of 13.2 dB. The minimum input referred P1dB is -24.1 dBm. With a multiplexer, the receiver reference can be separated from the transmitter, which allows the use of both independently from each other. The serial interface is realized in 0.13 μm CMOS logic and consists of a 20 bit shift register, decoder and an analog interface.
AB - In this paper a 60 GHz monolithic bistatic interferometric radar transceiver for high precision measuring is presented. The integrated transceiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a LNA, a passive six-port structure, detectors, multiplier, multiplexer, power amplifier and a digital interface. The chip has a size of 2330 μm x 1360 μm and a maximum power consumption of 533 mW from a 3.3 V power supply. The circuit provides two frequency inputs of 7.5 and 15 GHz and multiplies them up to 60 GHz at a minimum input power of -20 dBm. The chip delivers a maximum output power of 9 dBm at 61 GHz. The input path is selectable and the output power is adjustable by a digital interface between -23 and 9 dBm at 60 GHz. Also the reference input power of the six-port and the RF input power can be adjusted in a range of 13.2 dB. The minimum input referred P1dB is -24.1 dBm. With a multiplexer, the receiver reference can be separated from the transmitter, which allows the use of both independently from each other. The serial interface is realized in 0.13 μm CMOS logic and consists of a 20 bit shift register, decoder and an analog interface.
KW - SiGe BiCMOS
KW - bistatic radar
KW - digital adjustable
KW - industrial radar
KW - integrated transceiver
KW - interferometric radar
KW - millimeter wave circuits
KW - six-port
UR - http://www.scopus.com/inward/record.url?scp=85076475781&partnerID=8YFLogxK
U2 - 10.23919/EuMIC.2019.8909608
DO - 10.23919/EuMIC.2019.8909608
M3 - Conference contribution
AN - SCOPUS:85076475781
T3 - EuMIC 2019 - 2019 14th European Microwave Integrated Circuits Conference
SP - 220
EP - 223
BT - EuMIC 2019 - 2019 14th European Microwave Integrated Circuits Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 14th European Microwave Integrated Circuits Conference, EuMIC 2019
Y2 - 30 September 2019 through 1 October 2019
ER -