A Comparison of Parallel Programming Models of Network Processors

Carsten Albrecht, Rainer Hagenau, Erik Maehle, Andreas Döring, Andreas Herkersdorf

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Today’s network processor utilize parallel processing in order to cope with the traffic growth and wire-speed of current and future network technologies. In this paper, we study two important parallel programming models for network processors: run to completion and pipelining. In particular, the packet flow of a standard network application, IPv4 Forwarding, through two examined network processors, IBM PowerNP NP4GS3 and Intel IXP1200, is reviewed and characterized in respect to their programming models. Based on a benchmark for PC-cluster SANs, their application throughput and latency for Gigabit Ethernet is investigated and compared to a commercial, ASIC-based switch. It is shown that in this scenario network processors can compete with hard-wired solutions.

Original languageEnglish
Title of host publicationARCS 2004 - Organic and Pervasive Computing, Workshops Proceedings
EditorsUwe Brinkschulte, Jurgen Becker, Dietmar Fey, Karl-Erwin Grosspietsch, Christian Hochberger, Erik Maehle, Thomas A. Runkler
PublisherGesellschaft fur Informatik (GI)
Pages390-399
Number of pages10
ISBN (Electronic)3885793709
StatePublished - 2004
Externally publishedYes
Event17th Organic and Pervasive Computing Workshops, ARCS 2004 - Augsburg, Germany
Duration: 26 Mar 2004 → …

Publication series

NameLecture Notes in Informatics (LNI), Proceedings - Series of the Gesellschaft fur Informatik (GI)
VolumeP-41
ISSN (Print)1617-5468

Conference

Conference17th Organic and Pervasive Computing Workshops, ARCS 2004
Country/TerritoryGermany
CityAugsburg
Period26/03/04 → …

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