A 65nm test structure for the analysis of NBTI induced statistical variation in SRAM transistors

Thomas Fischer, Ettore Amirante, Karl Hofmann, Martin Ostermayr, Peter Huber, Doris Schmitt-Landsiedel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

31 Scopus citations

Abstract

We present the results of a test structure that allows to measure the variation of SRAM p-MOS and n-MOS transistors in a dense environment and to apply Negative Bias Temperature Instability (NBTI) stress on the p-MOS transistors. The threshold voltage (Vth) and drain current (I d) distributions of p-MOS SRAM transistors pre and post NBTI Stress are measured and analyzed. The probability density functions (PDF) of both transistor parameters Vth and Id follow a Gaussian distribution pre and post NBTI stress, but the difference in the transistor parameters of an individual device is not Gaussian distributed. The standard deviation in the difference of Vth is about 50% of the mean for the small SRAM p-MOS transistor. The impact of the additional variation induced by NBTI stress is shown for the Static Noise Margin of a 6-T SRAM cell.

Original languageEnglish
Title of host publicationESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference
PublisherIEEE Computer Society
Pages51-54
Number of pages4
ISBN (Print)9781424423644
DOIs
StatePublished - 2008
EventESSDERC 2008 - 38th European Solid-State Device Research Conference - Edinburgh, Scotland, United Kingdom
Duration: 15 Sep 200819 Sep 2008

Publication series

NameESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference

Conference

ConferenceESSDERC 2008 - 38th European Solid-State Device Research Conference
Country/TerritoryUnited Kingdom
CityEdinburgh, Scotland
Period15/09/0819/09/08

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