A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/s

  • M. Jefremow
  • , T. Kern
  • , U. Backhausen
  • , J. Elbs
  • , B. Rousseau
  • , C. Roll
  • , L. Castro
  • , T. Roehr
  • , E. Paparisto
  • , K. Herfurth
  • , R. Bartenschlager
  • , S. Thierold
  • , R. Renardy
  • , S. Kassenetter
  • , N. Lawal
  • , M. Strasser
  • , W. Trottmann
  • , D. Schmitt-Landsiedel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

This paper presents a 65nm embedded flash macro for automotive applications with read and write throughput of 5.7GB/s and 1.4MB/s respectively. The high read throughput rate is achieved by using the multi voltage domain multiplexer design enabling a low voltage read path and the local ground referenced read circuit design utilizing the robust time domain source side sense amplifier (SoSiSA) [1]. This allows low voltage sub 50mV swing read operation for high speed read-out under more than 30mV system noise. The hot source triple poly (HS3P) embedded flash memory cell [2] allows sub 5μs low current write operation enabling high write throughput up to a junction temperature of 170°C.

Original languageEnglish
Title of host publicationESSCIRC 2013 - Proceedings of the 39th European Solid-State Circuits Conference
Pages193-196
Number of pages4
DOIs
StatePublished - 2013
Event39th European Solid-State Circuits Conference, ESSCIRC 2013 - Bucharest, Romania
Duration: 16 Sep 201320 Sep 2013

Publication series

NameEuropean Solid-State Circuits Conference
ISSN (Print)1930-8833

Conference

Conference39th European Solid-State Circuits Conference, ESSCIRC 2013
Country/TerritoryRomania
CityBucharest
Period16/09/1320/09/13

Fingerprint

Dive into the research topics of 'A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/s'. Together they form a unique fingerprint.

Cite this