A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation

Thomas Fischer; Christopher Otte; Doris Schmitt-Landsiedel; Ettore Amirante; Alexander Olbrich; Peter Huber; Martin Ostermayr; Thomas Nirschl; Jan Einfeld

doi:10.1109/ICMTS.2007.374456

A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation

Thomas Fischer, Christopher Otte, Doris Schmitt-Landsiedel, Ettore Amirante, Alexander Olbrich, Peter Huber, Martin Ostermayr, Thomas Nirschl, Jan Einfeld

Medicine and Health

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

We present an area efficient test structure that allows a measurement of the statistical distribution of SRAM cell currents beyond 5 sigma variation. The test structure was fabricated in a 90nm and a 65nm CMOS technology. The measured data show that the device variations are Gaussian-distributed for more than 1 million devices, covering more than 5 sigma of variation. Monte Carlo simulations are used to validate the measurements.

Original language	English
Title of host publication	2007 IEEE International Conference on Microelectronic Test Structures, ICMTS - Conference Proceedings
Pages	63-66
Number of pages	4
DOIs	https://doi.org/10.1109/ICMTS.2007.374456
State	Published - 2007
Event	2007 IEEE International Conference on Microelectronic Test Structures, ICMTS '07 - Bunkyo-ku, Japan Duration: 19 Mar 2007 → 22 Mar 2007

Publication series

Name	IEEE International Conference on Microelectronic Test Structures

Conference

Conference	2007 IEEE International Conference on Microelectronic Test Structures, ICMTS '07
Country/Territory	Japan
City	Bunkyo-ku
Period	19/03/07 → 22/03/07

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10.1109/ICMTS.2007.374456

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Fischer, T., Otte, C., Schmitt-Landsiedel, D., Amirante, E., Olbrich, A., Huber, P., Ostermayr, M., Nirschl, T., & Einfeld, J. (2007). A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation. In 2007 IEEE International Conference on Microelectronic Test Structures, ICMTS - Conference Proceedings (pp. 63-66). Article 4252406 (IEEE International Conference on Microelectronic Test Structures). https://doi.org/10.1109/ICMTS.2007.374456

@inproceedings{a49649672d544d058a54e4792554b9eb,

title = "A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation",

abstract = "We present an area efficient test structure that allows a measurement of the statistical distribution of SRAM cell currents beyond 5 sigma variation. The test structure was fabricated in a 90nm and a 65nm CMOS technology. The measured data show that the device variations are Gaussian-distributed for more than 1 million devices, covering more than 5 sigma of variation. Monte Carlo simulations are used to validate the measurements.",

author = "Thomas Fischer and Christopher Otte and Doris Schmitt-Landsiedel and Ettore Amirante and Alexander Olbrich and Peter Huber and Martin Ostermayr and Thomas Nirschl and Jan Einfeld",

year = "2007",

doi = "10.1109/ICMTS.2007.374456",

language = "English",

isbn = "142440780X",

series = "IEEE International Conference on Microelectronic Test Structures",

pages = "63--66",

booktitle = "2007 IEEE International Conference on Microelectronic Test Structures, ICMTS - Conference Proceedings",

note = "2007 IEEE International Conference on Microelectronic Test Structures, ICMTS '07 ; Conference date: 19-03-2007 Through 22-03-2007",

}

Fischer, T, Otte, C, Schmitt-Landsiedel, D, Amirante, E, Olbrich, A, Huber, P, Ostermayr, M, Nirschl, T & Einfeld, J 2007, A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation. in 2007 IEEE International Conference on Microelectronic Test Structures, ICMTS - Conference Proceedings., 4252406, IEEE International Conference on Microelectronic Test Structures, pp. 63-66, 2007 IEEE International Conference on Microelectronic Test Structures, ICMTS '07, Bunkyo-ku, Japan, 19/03/07. https://doi.org/10.1109/ICMTS.2007.374456

A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation. / Fischer, Thomas; Otte, Christopher; Schmitt-Landsiedel, Doris et al.
2007 IEEE International Conference on Microelectronic Test Structures, ICMTS - Conference Proceedings. 2007. p. 63-66 4252406 (IEEE International Conference on Microelectronic Test Structures).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation

AU - Fischer, Thomas

AU - Otte, Christopher

AU - Schmitt-Landsiedel, Doris

AU - Amirante, Ettore

AU - Olbrich, Alexander

AU - Huber, Peter

AU - Ostermayr, Martin

AU - Nirschl, Thomas

AU - Einfeld, Jan

PY - 2007

Y1 - 2007

N2 - We present an area efficient test structure that allows a measurement of the statistical distribution of SRAM cell currents beyond 5 sigma variation. The test structure was fabricated in a 90nm and a 65nm CMOS technology. The measured data show that the device variations are Gaussian-distributed for more than 1 million devices, covering more than 5 sigma of variation. Monte Carlo simulations are used to validate the measurements.

AB - We present an area efficient test structure that allows a measurement of the statistical distribution of SRAM cell currents beyond 5 sigma variation. The test structure was fabricated in a 90nm and a 65nm CMOS technology. The measured data show that the device variations are Gaussian-distributed for more than 1 million devices, covering more than 5 sigma of variation. Monte Carlo simulations are used to validate the measurements.

UR - https://www.scopus.com/pages/publications/34548836031

U2 - 10.1109/ICMTS.2007.374456

DO - 10.1109/ICMTS.2007.374456

M3 - Conference contribution

AN - SCOPUS:34548836031

SN - 142440780X

SN - 9781424407804

T3 - IEEE International Conference on Microelectronic Test Structures

SP - 63

EP - 66

BT - 2007 IEEE International Conference on Microelectronic Test Structures, ICMTS - Conference Proceedings

T2 - 2007 IEEE International Conference on Microelectronic Test Structures, ICMTS '07

Y2 - 19 March 2007 through 22 March 2007

ER -

Fischer T, Otte C, Schmitt-Landsiedel D, Amirante E, Olbrich A, Huber P et al. A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation. In 2007 IEEE International Conference on Microelectronic Test Structures, ICMTS - Conference Proceedings. 2007. p. 63-66. 4252406. (IEEE International Conference on Microelectronic Test Structures). doi: 10.1109/ICMTS.2007.374456

A 1 Mbit SRAM test structure to analyze local mismatch beyond 5 sigma variation

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