90nm 4.7ps-Resolution 0.7-LSB single-shot precision and 19pJ-per-shot local passive interpolation time-to-digital converter with on-chip characterization

Stephan Henzler, Siegmar Koeppe, Winfried Kamp, Hans Mulatz, Doris Schmitt-Landsiedel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

93 Scopus citations

Abstract

The concept and on-chip characterization circuitry of a 90nm local passive interpolation TDC is presented. With an interpolation factor of 4, the resolution is 4.7ps at 1.2V with 0.7 LSB single-shot precision at 19pJ/shot power consumption. The measured INL and DNL are ±1.2 and ±0.6 LSB, respectively. Active compensation limits the error caused by 10psrms long-term clock jitter to ±1LSB.

Original languageEnglish
Title of host publication2008 IEEE International Solid State Circuits Conference - Digest of Technical Papers, ISSCC
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages548-550
Number of pages3
ISBN (Print)9781424420100
DOIs
StatePublished - 2008
Event2008 IEEE International Solid State Circuits Conference, ISSCC - San Francisco, CA, United States
Duration: 3 Feb 20087 Feb 2008

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume51
ISSN (Print)0193-6530

Conference

Conference2008 IEEE International Solid State Circuits Conference, ISSCC
Country/TerritoryUnited States
CitySan Francisco, CA
Period3/02/087/02/08

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