TY - GEN
T1 - 90nm 4.7ps-Resolution 0.7-LSB single-shot precision and 19pJ-per-shot local passive interpolation time-to-digital converter with on-chip characterization
AU - Henzler, Stephan
AU - Koeppe, Siegmar
AU - Kamp, Winfried
AU - Mulatz, Hans
AU - Schmitt-Landsiedel, Doris
PY - 2008
Y1 - 2008
N2 - The concept and on-chip characterization circuitry of a 90nm local passive interpolation TDC is presented. With an interpolation factor of 4, the resolution is 4.7ps at 1.2V with 0.7 LSB single-shot precision at 19pJ/shot power consumption. The measured INL and DNL are ±1.2 and ±0.6 LSB, respectively. Active compensation limits the error caused by 10psrms long-term clock jitter to ±1LSB.
AB - The concept and on-chip characterization circuitry of a 90nm local passive interpolation TDC is presented. With an interpolation factor of 4, the resolution is 4.7ps at 1.2V with 0.7 LSB single-shot precision at 19pJ/shot power consumption. The measured INL and DNL are ±1.2 and ±0.6 LSB, respectively. Active compensation limits the error caused by 10psrms long-term clock jitter to ±1LSB.
UR - http://www.scopus.com/inward/record.url?scp=46749143423&partnerID=8YFLogxK
U2 - 10.1109/ISSCC.2008.4523300
DO - 10.1109/ISSCC.2008.4523300
M3 - Conference contribution
AN - SCOPUS:46749143423
SN - 9781424420100
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 548
EP - 550
BT - 2008 IEEE International Solid State Circuits Conference - Digest of Technical Papers, ISSCC
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2008 IEEE International Solid State Circuits Conference, ISSCC
Y2 - 3 February 2008 through 7 February 2008
ER -