TY - GEN
T1 - 3D nanomagnetic logic
T2 - 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
AU - Becherer, Markus
AU - Csaba, Gyorgy
AU - Ziemys, Grazvydas
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/7/2
Y1 - 2017/7/2
N2 - In this work, a beyond CMOS technology, the so-called perpendicular Nanomagnetic Logic is discussed. It provides digital computation with non-volatile ferromagnetic computing states, purely powered and clocked by magnetic fields. Non-volatility combined with the capability of monolithic 3D integration in a planar fabrication process are key features. Instead of targeting CMOS substitution, additional functionality is provided by a co-processor architecture as an aimed back-end-of-line technology. Systolic, pipelined and massively parallel architectures with attojoule dissipation per bit operation are targeted.
AB - In this work, a beyond CMOS technology, the so-called perpendicular Nanomagnetic Logic is discussed. It provides digital computation with non-volatile ferromagnetic computing states, purely powered and clocked by magnetic fields. Non-volatility combined with the capability of monolithic 3D integration in a planar fabrication process are key features. Instead of targeting CMOS substitution, additional functionality is provided by a co-processor architecture as an aimed back-end-of-line technology. Systolic, pipelined and massively parallel architectures with attojoule dissipation per bit operation are targeted.
UR - https://www.scopus.com/pages/publications/85047630141
U2 - 10.1109/S3S.2017.8309232
DO - 10.1109/S3S.2017.8309232
M3 - Conference contribution
AN - SCOPUS:85047630141
T3 - 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
SP - 1
EP - 2
BT - 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 16 October 2017 through 18 October 2017
ER -