Wolfgang Ecker

Prof. Dr.-Ing.

1992 …2024

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  • 2019

    Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study

    Singh, E., Devarajegowda, K., Simon, S., Schnieder, R., Ganesan, K., Fadiheh, M., Stoffel, D., Kunz, W., Barrett, C., Ecker, W. & Mitra, S., 14 May 2019, Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019. Institute of Electrical and Electronics Engineers Inc., p. 1000-1005 6 p. 8715271. (Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Open Access
    10 Scopus citations
  • Towards a Python-Based One Language Ecosystem for Embedded Systems Automation

    Han, Z., Devarajegowda, K., Werner, M. & Ecker, W., Oct 2019, 2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings. Nurmi, J., Ellervee, P., Halonen, K. & Roning, J. (eds.). Institute of Electrical and Electronics Engineers Inc., 8906949. (2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    9 Scopus citations
  • 2018

    A machine learning approach for area prediction of hardware designs from abstract specifications

    Zennaro, E., Servadei, L., Devarajegowda, K. & Ecker, W., 12 Oct 2018, Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018. Konofaos, N., Novotny, M. & Skavhaug, A. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 413-420 8 p. 8491847. (Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    17 Scopus citations
  • Analog fault simulation automation at schematic level with random sampling techniques

    Wu, L., Hussain, M. K., Abughannam, S., Muller, W., Scheytt, C. & Ecker, W., 29 May 2018, Proceedings - 2018 13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p. (Proceedings - 2018 13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    3 Scopus citations
  • Meta-model Based Automation of Properties for Pre-Silicon Verification

    Devarajegowda, K. & Ecker, W., 2 Jul 2018, Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018. IEEE Computer Society, p. 231-236 6 p. 8644957. (IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC; vol. 2018-October).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    14 Scopus citations
  • 2017

    Digital hardware design based on metamodels and model transformations

    Schreiner, J. & Ecker, W., 2017, VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016. Reis, R., Hollstein, T., Raik, J., Kostin, S., Tsertov, A. & O’Connor, I. (eds.). Springer New York LLC, p. 83-107 25 p. (IFIP Advances in Information and Communication Technology; vol. 508).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    9 Scopus citations
  • Earth mover’s distance as a comparison metric for analog behavior

    Rath, A. W., Simon, S., Esen, V. & Ecker, W., 2017, VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016. Reis, R., Hollstein, T., Raik, J., Kostin, S., Tsertov, A. & O’Connor, I. (eds.). Springer New York LLC, p. 173-191 19 p. (IFIP Advances in Information and Communication Technology; vol. 508).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Open Access
  • On generation of properties from specification

    Devarajegowda, K. & Ecker, W., 5 Dec 2017, 2017 IEEE International High Level Design Validation and Test Workshop, HLDVT 2017. Institute of Electrical and Electronics Engineers Inc., p. 95-98 4 p. (2017 IEEE International High Level Design Validation and Test Workshop, HLDVT 2017; vol. 2017-January).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    5 Scopus citations
  • Python based framework for HDSLs with an underlying formal semantics: (Invited paper)

    Devarajegowda, K., Schreiner, J., Findenig, R. & Ecker, W., 13 Dec 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., p. 1019-1025 7 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2017-November).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    12 Scopus citations
  • The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping

    Mueller-Gritschneder, D., Devarajegowda, K., DIttrich, M., Ecker, W., Greim, M. & Schlichtmann, U., 19 Oct 2017, Proceedings of the 2017 28th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, RSP 2017. IEEE Computer Society, p. 79-84 6 p. (Proceedings - IEEE International Symposium on Rapid System Prototyping, RSP).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    18 Scopus citations
  • 2016

    Automatically comparing analog behavior using Earth Mover's Distance

    Rath, A. W., Simon, S., Esen, V. & Ecker, W., 22 Nov 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016. Institute of Electrical and Electronics Engineers Inc., 7753556. (2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • Design centric modeling of digital hardware

    Schreiner, J., Findenigy, R. & Ecker, W., 17 Nov 2016, 2016 IEEE International High Level Design Validation and Test Workshop, HLDVT 2016. Institute of Electrical and Electronics Engineers Inc., p. 46-52 7 p. 7748254. (2016 IEEE International High Level Design Validation and Test Workshop, HLDVT 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    30 Scopus citations
  • Efficient Checkpointing-Based Safety-Verification Flow Using Compiled-Code Simulation

    Tabacaru, B. A., Chaari, M., Ecker, W., Kruse, T. & Novello, C., 26 Oct 2016, Proceedings - 19th Euromicro Conference on Digital System Design, DSD 2016. Kitsos, P. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 364-371 8 p. 7723575. (Proceedings - 19th Euromicro Conference on Digital System Design, DSD 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • Efficient handling of the fault space in functional safety analysis utilizing formal methods

    Bernardini, A., Ecker, W. & Schlichtmann, U., 22 Nov 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016. Institute of Electrical and Electronics Engineers Inc., 7753546. (2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • Fault-effect analysis on system-level hardware modeling using virtual prototypes

    Tabacaru, B. A., Chaari, M., Ecker, W., Kruse, T. & Novello, C., 2 Jul 2016, FDL 2016 - 2016 Forum on Specification and Design Languages, Proceedings. IEEE Computer Society, 7880368. (Forum on Specification and Design Languages; vol. 0).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    10 Scopus citations
  • Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study

    Abughannam, S., Wu, L., Mueller, W., Scheytt, C., Ecker, W. & Novello, C., 2016, ANALOG 2016 - 15. ITG/GMM-Fachtagung. VDE VERLAG GMBH, p. 75-80 6 p. (ANALOG 2016 - 15. ITG/GMM-Fachtagung).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • Gate-level-accurate fault-effect analysis at virtual-prototype speed

    Tabacaru, B. A., Chaari, M., Ecker, W., Kruse, T. & Novello, C., 2016, Computer Safety, Reliability, and Security, SAFECOMP 2016 - Workshops ASSURE, DECSoS, SASSUR, and TIPS, Proceedings. Guiochet, J., Schoitsch, E., Bitsch, F. & Skavhaug, A. (eds.). Springer Verlag, p. 144-156 13 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9923 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • Introducing Model-of-Things (MoT) and Model-of-Design (MoD) for simpler and more efficient hardware generators

    Ecker, W. & Schreiner, J., 22 Nov 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016. Institute of Electrical and Electronics Engineers Inc., 7753576. (2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    18 Scopus citations
  • Speeding up safety verification by fault abstraction and simulation to transaction level

    Tabacaru, B. A., Chaari, M., Ecker, W., Kruse, T. & Novello, C., 22 Nov 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016. Institute of Electrical and Electronics Engineers Inc., 7753547. (2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    6 Scopus citations
  • Transformation of Failure Propagation Models into Fault Trees for Safety Evaluation Purposes

    Chaari, M., Ecker, W., Kruse, T., Novello, C. & Tabacaru, B. A., 22 Sep 2016, Proceedings - 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN-W 2016. Institute of Electrical and Electronics Engineers Inc., p. 226-229 4 p. 7575382. (Proceedings - 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN-W 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    5 Scopus citations
  • Where formal verification can help in functional safety analysis

    Bernardini, A., Ecker, W. & Schlichtmann, U., 7 Nov 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2016. Institute of Electrical and Electronics Engineers Inc., 2980087. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 07-10-November-2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    13 Scopus citations
  • 2015

    A model-based and simulation-assisted FMEDA approach for safety-relevant E/E systems

    Chaari, M., Ecker, W., Novello, C., Tabacaru, B. A. & Kruse, T., 24 Jul 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015. Institute of Electrical and Electronics Engineers Inc., 7167184. (Proceedings - Design Automation Conference; vol. 2015-July).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    7 Scopus citations
  • The next generation of virtual prototyping: Ultra-fast yet accurate simulation of HW/SW systems

    Bringmann, O., Ecker, W., Gerstlauer, A., Goyal, A., Mueller-Gritschneder, D., Sasidharan, P. & Singh, S., 22 Apr 2015, Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015. Institute of Electrical and Electronics Engineers Inc., p. 1698-1707 10 p. 7092666. (Proceedings -Design, Automation and Test in Europe, DATE; vol. 2015-April).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    49 Scopus citations
  • 2014

    A transaction-oriented UVM-based library for verification of analog behavior

    Rath, A. W., Esen, V. & Ecker, W., 2014, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings. p. 806-811 6 p. 6742989. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    9 Scopus citations
  • Metasynthesis for designing automotive socs

    Ecker, W., Velten, M., Zafari, L. & Goyal, A., 2014, DAC 2014 - 51st Design Automation Conference, Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2602974. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    6 Scopus citations
  • Safety evaluation of automotive electronics using virtual prototypes: State of the art and research challeng

    Oetjens, J. H., Bannow, N., Becker, M., Bringmann, O., Burger, A., Chaari, M., Chakraborty, S., Drechsler, R., Ecker, W., Grüttner, K., Kruse, T., Kuznik, C., Le, H. M., Mauderer, A., Müller, W., Müller-Gritschneder, D., Poppen, F., Post, H., Reiter, S. & Rosenstiel, W. & 5 others, Roth, S., Schlichtmann, U., Schwerin, A. V., Tabacaru, B. A. & Viehl, A., 2014, DAC 2014 - 51st Design Automation Conference, Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2602976. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    39 Scopus citations
  • The metamodeling approach to system level synthesis

    Ecker, W., Velten, M., Zafari, L. & Goyal, A., 2014, Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 6800525. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    15 Scopus citations
  • 2013

    Comparison of analog transactions using statistics

    Rath, A. W., Esen, V. & Ecker, W., 2013, 2013 International Symposium on System-on-Chip, SoC 2013 - Proceedings. IEEE Computer Society, 6675282. (2013 International Symposium on System-on-Chip, SoC 2013 - Proceedings).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • The semantic of the power intent format UPF: Consistent power modeling from system level to implementation

    Karmann, J. & Ecker, W., 2013, 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2013. IEEE Computer Society, p. 45-50 6 p. 6662154. (2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2013).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    19 Scopus citations
  • Transaction-level modeling and refinement using state charts

    Findenig, R., Leitner, T. & Ecker, W., 2013, Computer Aided Systems Theory, EUROCAST 2013 - 14th International Conference, Revised Selected Papers. PART 1 ed. Springer Verlag, p. 134-141 8 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8111 LNCS, no. PART 1).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • 2012

    Single-source hardware modeling of different abstraction levels with state charts

    Findenig, R., Leitner, T. & Ecker, W., 2012, 2012 IEEE International High Level Design Validation and Test Workshop, HLDVT 2012. p. 41-48 8 p. 6418241. (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • SystemC as completing pillar in industrial OVM based verification environments

    Ecker, W., Esen, V., Velten, M. & Timisescu, T., 2012, CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK. p. 307-311 5 p. (CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • Testbenches for advanced TLM verification

    Mueller, W. & Ecker, W., 2012, CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK. p. 305 1 p. (CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • The System Verification Methodology for advanced TLM verification

    Oliveira, M. F. S., Haedicke, F., Drechsler, R., Kuznik, C., Le, H. M., Ecker, W., Mueller, W., Große, D. & Esen, V., 2012, CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK. p. 313-322 10 p. (CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Open Access
    17 Scopus citations
  • 2011

    Analog transaction level modeling

    Rath, A. W., Esen, V. & Ecker, W., 2011, 2011 IEEE International High Level Design Validation and Test Workshop, HLDVT'11. p. 82 1 p. 6114171. (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • 2010

    Fast and accurate UML state chart modeling using TLM+ control flow abstraction

    Findenig, R., Leitner, T., Velten, M. & Ecker, W., 2010, HLDVT'10 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings. p. 97-102 6 p. 5496654. (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • Model reduction techniques for the formal verification of hardware dependent software

    Ecker, W., Esen, V., Findenig, R., Steininger, T. & Velten, M., 2010, HLDVT'10 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings. p. 148-153 6 p. 5496647. (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • State chart refinement validation from approximately timed to cycle callable models

    Findenig, R. & Ecker, W., 2010, 2010 International Symposium on System-on-Chip Proceedings, SoC 2010. p. 72-75 4 p. 5625551. (2010 International Symposium on System-on-Chip Proceedings, SoC 2010).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • TLM+ modeling of embedded HW/SW systems

    Ecker, W., Esen, V., Schwencker, R., Steininger, T. & Velten, M., 2010, DATE 10 - Design, Automation and Test in Europe. Institute of Electrical and Electronics Engineers Inc., p. 75-80 6 p. 5457234. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    13 Scopus citations
  • 2009

    Using a dataflow abstracted virtual prototype for HdS-design

    Ecker, W., Heinen, S. & Velten, M., 2009, Proceedings of the ASP-DAC 2009: Asia and South Pacific Design Automation Conference 2009. p. 293-300 8 p. 4796496. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    8 Scopus citations
  • 2008

    Industrial IP integration flows based on IP-XACT™ standards

    Kruijtzer, W., Van Der Wolf, P., De Kock, E., Stuyt, J., Ecker, W., Mayer, A., Hustin, S., Amerijckx, C., De Paoli, S. & Vaumorin, E., 2008, Design, Automation and Test in Europe, DATE 2008. p. 32-37 6 p. 4484656. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    43 Scopus citations
  • 2007

    Impact of description language, abstraction layer, and value representation on simulation performance

    Ecker, W., Esen, V., Schönberg, L., Steininger, T., Velten, M. & Hull, M., 2007, Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007. p. 767-772 6 p. 4211893. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    14 Scopus citations
  • Implementation of a transaction level assertion framework in systemC

    Ecker, W., Esen, V., Steininger, T., Velten, M. & Hull, M., 2007, Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007. p. 894-899 6 p. 4211916. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    45 Scopus citations
  • 2006

    Execution semantics and formalisms for multi-abstraction TLM assertions

    Ecker, W., Esen, V., Steininger, T., Velten, M. & Hull, M., 2006, Proceedings - Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE'06. IEEE Computer Society, p. 93-102 10 p. 1695910. (Proceedings - Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE'06).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    19 Scopus citations
  • Specification language for transaction level assertions

    Ecker, W., Esen, V., Steininger, T., Velten, M. & Hull, M., 2006, Proceedings - 11th Annual IEEE International High-Level Design Validation and Test Workshop, HLDVT'06. p. 77-84 8 p. 4110066. (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    14 Scopus citations
  • 2005

    Evolution of paradigm shifts in the automated design process of digital circuits

    Ecker, W. & Schrader, L., 2005, INFORMATIK 2005 - Informatik LIVE!, Beitrage der 35. Jahrestagung der Gesellschaft fur Informatik e.V. (GI). p. 313 1 p. (INFORMATIK 2005 - Informatik LIVE!, Beitrage der 35. Jahrestagung der Gesellschaft fur Informatik e.V. (GI); vol. 1).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • 2004

    Memory models for the formal verification of assembler code using bounded model checking

    Ecker, W., Esen, V., Steininger, T. & Zambaldi, M., 2004, Proceedings - Seventh IEEE International Symposium on Object-Oriented Real-Time Distributed Computing. Gustafsson, J., Aoki, T. & Lee, I. (eds.). p. 129-135 7 p. (Proceedings - Seventh IEEE International Symposium on Object-Oriented Real-Time Distributed Computing).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    3 Scopus citations
  • 2003

    An approach for mixed coarse-granular and fine-granular re-configurable architectures

    Henftling, R., Ecker, W., Zinn, A., Zambaldi, M. & Bauer, M., 2003, Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003. Institute of Electrical and Electronics Engineers Inc., 1213346. (Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • Tutorial (T-3) accelerated testbenches

    Ecker, W. & Henftling, R., 2003, ASICON 2003 - 2003 5th International Conference on ASIC, Proceedings. Tang, T.-A., Li, W. & Yu, H. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 11 1 p. 05733667. (IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings; vol. 1).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • 2000

    A JAVA-based mixed-signal design environment

    Mades, J., Schneider, T., Glesner, M., Windisch, A. & Ecker, W., 2000, Proceedings - 13th Symposium on Integrated Circuits and Systems Design. Reis, R., Van Noije, W. & Monteiro, J. C. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 301-306 6 p. 876046. (Proceedings - 13th Symposium on Integrated Circuits and Systems Design).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations