Weighted partitioning of sequential processing chains for dynamically reconfigurable FPGAS

Keyphrases

• Field Programmable Gate Arrays 100%
• Processing Chain 100%
• Sequential Processing 100%
• Dynamically Reconfigurable 100%
• Partitioning Algorithms 50%
• Linear Complexity 50%
• Processing Element 50%
• Data Throughput 50%
• Runtime Reconfiguration 50%
• Sequential Execution 50%
• Signal Processing Module 50%
• Reconfigurable Partition 50%
• Limited Datasets 50%

Computer Science

• Processing Chain 100%
• Processing Element 50%
• Throughput Data 50%
• Reconfiguration 50%
• Field Programmable Gate Arrays 50%