TY - GEN
T1 - Voltage gradient limitation of IGBTs by optimised gate-current profiles
AU - Schmitt, G.
AU - Kennel, R.
AU - Holtz, J.
PY - 2008
Y1 - 2008
N2 - Using MOS-controlled semiconductors provide the opportunity to directly affect the voltage and currents gradients during the switching transients at the gate. An active gate driver is presented that imposes optimised gate current profiles in order to limit the dv/dt and di/dt. When limiting the dv/dt to 1 kV/μs the switching losses are be reduced by 35% in comparison to the common limitation method by gate resistor. The switch-off losses are improved about 10% by employing an optimised gate signal.
AB - Using MOS-controlled semiconductors provide the opportunity to directly affect the voltage and currents gradients during the switching transients at the gate. An active gate driver is presented that imposes optimised gate current profiles in order to limit the dv/dt and di/dt. When limiting the dv/dt to 1 kV/μs the switching losses are be reduced by 35% in comparison to the common limitation method by gate resistor. The switch-off losses are improved about 10% by employing an optimised gate signal.
UR - http://www.scopus.com/inward/record.url?scp=52349095077&partnerID=8YFLogxK
U2 - 10.1109/PESC.2008.4592512
DO - 10.1109/PESC.2008.4592512
M3 - Conference contribution
AN - SCOPUS:52349095077
SN - 9781424416684
T3 - PESC Record - IEEE Annual Power Electronics Specialists Conference
SP - 3592
EP - 3596
BT - PESC '08 - 39th IEEE Annual Power Electronics Specialists Conference - Proceedings
T2 - PESC '08 - 39th IEEE Annual Power Electronics Specialists Conference
Y2 - 15 June 2008 through 19 June 2008
ER -