TY - GEN
T1 - vFPIO
T2 - 2024 USENIX Annual Technical Conference, ATC 2024
AU - Chen, Jiyang
AU - Unnibhavi, Harshavardhan
AU - Koshiba, Atsushi
AU - Bhatotia, Pramod
N1 - Publisher Copyright:
© 2024 Proceedings of the 2024 USENIX Annual Technical Conference, ATC 2024. All rights reserved.
PY - 2024
Y1 - 2024
N2 - Modern cloud systems have adopted a variety of FPGA-accelerated I/O devices, such as SmartNICs and computational storage, while they face programmability and portability challenges. Existing FPGA frameworks either directly expose device-specific I/O interfaces to user logic or offer virtualized I/Os limited to a single device type. The lack of I/O abstraction imposes high engineering costs, less design portability, and even unexpected throughput degradation. We introduce vFPIO, an FPGA-based I/O acceleration framework that brings better programmability and design portability. vFPIO extends modern FPGA OSes to expose virtual I/O ports to user logic, which abstracts device-dependent I/O specifications and makes the user logic design platform-agnostic. The connectivity between virtual and physical I/O ports can be easily configured by host applications using POSIX-like file APIs. vFPIO also offers a preemptive I/O transaction scheduler that alleviates the I/O throughput degradation caused by concurrent I/O requests from multiple accelerators in a multi-tenant environment. We implement a prototype of the vFPIO framework on x86 servers equipped with AMD Xilinx Alveo U280 cards and support four different I/O interfaces: PCIe, DRAM, HBM, and network. Our evaluation highlights that vFPIO incurs negligible performance overheads compared to Coyote, one of the latest FPGA OSes, while preserving the maximum I/O throughput for high-priority tasks even under resource contention.
AB - Modern cloud systems have adopted a variety of FPGA-accelerated I/O devices, such as SmartNICs and computational storage, while they face programmability and portability challenges. Existing FPGA frameworks either directly expose device-specific I/O interfaces to user logic or offer virtualized I/Os limited to a single device type. The lack of I/O abstraction imposes high engineering costs, less design portability, and even unexpected throughput degradation. We introduce vFPIO, an FPGA-based I/O acceleration framework that brings better programmability and design portability. vFPIO extends modern FPGA OSes to expose virtual I/O ports to user logic, which abstracts device-dependent I/O specifications and makes the user logic design platform-agnostic. The connectivity between virtual and physical I/O ports can be easily configured by host applications using POSIX-like file APIs. vFPIO also offers a preemptive I/O transaction scheduler that alleviates the I/O throughput degradation caused by concurrent I/O requests from multiple accelerators in a multi-tenant environment. We implement a prototype of the vFPIO framework on x86 servers equipped with AMD Xilinx Alveo U280 cards and support four different I/O interfaces: PCIe, DRAM, HBM, and network. Our evaluation highlights that vFPIO incurs negligible performance overheads compared to Coyote, one of the latest FPGA OSes, while preserving the maximum I/O throughput for high-priority tasks even under resource contention.
UR - http://www.scopus.com/inward/record.url?scp=85201217087&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85201217087
T3 - Proceedings of the 2024 USENIX Annual Technical Conference, ATC 2024
SP - 1167
EP - 1184
BT - Proceedings of the 2024 USENIX Annual Technical Conference, ATC 2024
PB - USENIX Association
Y2 - 10 July 2024 through 12 July 2024
ER -