@inbook{8805228d2bc24079892f493e9ca1859a,
title = "Two level compact simulation methodology for timing analysis of power-switched circuits",
abstract = "Standby-power dissipation in ultra-deep submicron CMOS can be reduced by power switching. As the cut-off device has a strong impact on area consumption, minimum power-down time, signal delay and leakage suppression, a proper sizing of this device is of general importance. Therefore a two level compact simulation methodology is proposed which provides fast and accurate CAD support to the switch design task.",
author = "Stephan Henzler and Georg Georgakos and J{\"o}rg Berthold and Doris Schmitt-Landsiedel",
year = "2004",
doi = "10.1007/978-3-540-30205-6_81",
language = "English",
isbn = "3540230955",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "789--798",
editor = "Enrico Macii and Vassilis Paliouras and Odysseas Koufopavlou",
booktitle = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
}