Training Large Language Models for System-Level Test Program Generation Targeting Non-functional Properties

Denis Schwachhofer, Peter Domanski, Steffen Becker, Stefan Wagner, Matthias Sauer, Dirk Pfluger, Ilia Polian

Publikation: Beitrag in Buch/Bericht/KonferenzbandKonferenzbeitragBegutachtung

Abstract

System-Level Test (SLT) has been an integral part of integrated circuit test flows for over a decade and continues to be significant. Nevertheless, there is a lack of systematic approaches for generating test programs, specifically focusing on the non-functional aspects of the Device under Test (DUT). Currently, test engineers manually create test suites using commercially available software to simulate the end-user environment of the DUT. This process is challenging and laborious and does not assure adequate control over non-functional properties. This paper proposes to use Large Language Models (LLMs) for SLT program generation. We use a pre-trained LLM and fine-tune it to generate test programs that optimize non-functional properties of the DUT, e.g., instructions per cycle. Therefore, we use Gem5, a microarchitectural simulator, in conjunction with Reinforcement Learning-based training. Finally, we write a prompt to generate C code snippets that maximize the instructions per cycle of the given architecture. In addition, we apply hyperparameter optimization to achieve the best possible results in inference.

OriginalspracheEnglisch
TitelProceedings - 2024 29th IEEE European Test Symposium, ETS 2024
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers Inc.
ISBN (elektronisch)9798350349320
DOIs
PublikationsstatusVeröffentlicht - 2024
Veranstaltung29th IEEE European Test Symposium, ETS 2024 - The Hague, Niederlande
Dauer: 20 Mai 202424 Mai 2024

Publikationsreihe

NameProceedings of the European Test Workshop
ISSN (Print)1530-1877
ISSN (elektronisch)1558-1780

Konferenz

Konferenz29th IEEE European Test Symposium, ETS 2024
Land/GebietNiederlande
OrtThe Hague
Zeitraum20/05/2424/05/24

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