TY - GEN
T1 - Special Session
T2 - 2023 ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2023
AU - Alcorta, Erika S.
AU - Gerstlauer, Andreas
AU - Deng, Chenhui
AU - Sun, Qi
AU - Zhang, Zhiru
AU - Xu, Ceyu
AU - Wills, Lisa Wu
AU - Lopera, Daniela Sanchez
AU - Ecker, Wolfgang
AU - Garg, Siddharth
AU - Hu, Jiang
N1 - Publisher Copyright:
© 2023 ACM.
PY - 2023
Y1 - 2023
N2 - Embedded systems are becoming increasingly complex, which has led to a productivity crisis in their design and verification. Although conventional design automation coupled with IP and platform reuse techniques have led to leaps in design productivity improvement, they face fundamental limits given that most design optimization and verification problems remain NP-hard and that reuse of pre-designed IP blocks and platforms inherently limits flexibility and optimality. At the same time, machine learning (ML) has recently made unprecedented advances and created phenomenal impact in various computing applications. In particular, application of ML techniques as a way to extract knowledge and learn from existing design, optimization and verification data has recently seen a lot of excitement and promise at lower physical and integrated circuit levels of abstraction. Using ML has the potential to similarly close the complexity gap in embedded system design, but corresponding ML-based approaches for embedded system optimization and verification at higher levels of abstraction are still at their infancy. This paper presents the current state of the art, along with opportunities and open challenges, in the application of ML methods for embedded system design and optimization. We discuss design and optimization at different levels of abstraction ranging from system-level modeling and optimization and high-level synthesis to RTL and micro-architecture design, bringing together perspectives from different communities in both academia and industry.
AB - Embedded systems are becoming increasingly complex, which has led to a productivity crisis in their design and verification. Although conventional design automation coupled with IP and platform reuse techniques have led to leaps in design productivity improvement, they face fundamental limits given that most design optimization and verification problems remain NP-hard and that reuse of pre-designed IP blocks and platforms inherently limits flexibility and optimality. At the same time, machine learning (ML) has recently made unprecedented advances and created phenomenal impact in various computing applications. In particular, application of ML techniques as a way to extract knowledge and learn from existing design, optimization and verification data has recently seen a lot of excitement and promise at lower physical and integrated circuit levels of abstraction. Using ML has the potential to similarly close the complexity gap in embedded system design, but corresponding ML-based approaches for embedded system optimization and verification at higher levels of abstraction are still at their infancy. This paper presents the current state of the art, along with opportunities and open challenges, in the application of ML methods for embedded system design and optimization. We discuss design and optimization at different levels of abstraction ranging from system-level modeling and optimization and high-level synthesis to RTL and micro-architecture design, bringing together perspectives from different communities in both academia and industry.
KW - Embedded System Design
KW - Machine Learning
UR - http://www.scopus.com/inward/record.url?scp=85179760302&partnerID=8YFLogxK
U2 - 10.1145/3607888.3608962
DO - 10.1145/3607888.3608962
M3 - Conference contribution
AN - SCOPUS:85179760302
T3 - Proceedings - 2023 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2023
SP - 28
EP - 37
BT - Proceedings - 2023 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2023
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 17 September 2023 through 22 September 2023
ER -