TY - GEN
T1 - RRAM-based Neuromorphic Computing
T2 - 25th Euromicro Conference on Digital System Design, DSD 2022
AU - Zhang, Grace Li
AU - Zhang, Shuhang
AU - Li, Hai Helen
AU - Schlichtmann, Ulf
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - RRAM crossbars provide a promising hardware plat-form to accelerate matrix-vector multiplication in deep neural networks (DNNs). To exploit the efficiency of RRAM crossbars, extensive research ex-amining architecture, data representation, logic de-sign as well as device programming should be conducted. This extensive scope of research aspects is enabled and required by the versatility of RRAM cells and their organization in a computing system. These research aspects affect or benefit each other. Therefore, they should be considered systematically to achieve an efficient design in terms of design complexity and computational performance in accelerating DNNs. In this paper, we illustrate study exam-ples on these perspectives on RRAM crossbars, in-cluding data representation with pulse widths, archi-tecture improvement, implementation of logic functions using RRAM cells, and efficient programming of RRAM devices for accelerating DNNs.
AB - RRAM crossbars provide a promising hardware plat-form to accelerate matrix-vector multiplication in deep neural networks (DNNs). To exploit the efficiency of RRAM crossbars, extensive research ex-amining architecture, data representation, logic de-sign as well as device programming should be conducted. This extensive scope of research aspects is enabled and required by the versatility of RRAM cells and their organization in a computing system. These research aspects affect or benefit each other. Therefore, they should be considered systematically to achieve an efficient design in terms of design complexity and computational performance in accelerating DNNs. In this paper, we illustrate study exam-ples on these perspectives on RRAM crossbars, in-cluding data representation with pulse widths, archi-tecture improvement, implementation of logic functions using RRAM cells, and efficient programming of RRAM devices for accelerating DNNs.
UR - http://www.scopus.com/inward/record.url?scp=85146701569&partnerID=8YFLogxK
U2 - 10.1109/DSD57027.2022.00063
DO - 10.1109/DSD57027.2022.00063
M3 - Conference contribution
AN - SCOPUS:85146701569
T3 - Proceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 2022
SP - 423
EP - 428
BT - Proceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 2022
A2 - Fabelo, Himar
A2 - Ortega, Samuel
A2 - Skavhaug, Amund
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 31 August 2022 through 2 September 2022
ER -