Power cycling and temperature endurance test of a GaN switching cell with substrate integrated chips

We present a reliability study of a half-bridge switching cell with substrate integrated 650 V GaN HEMTs. Power Cycling Testing with a ΔT_j of 100 K has revealed thermo-mechanically induced failures of contact vias after more than 220 kcycles. The via failure mode of contact opening is confirmed by reverse-bias pulsed IV-measurements to be primarily triggered by a ΔT_j imposed thermal gradient and not by a high T_j. The chip electrical characteristics, however, remained unaffected during Power Cycling. Furthermore, a High Temperature Storage test at 125 °C for 5000 h has shown no changes in the electrical performance of substrate integrated GaN HEMTs.