TY - GEN
T1 - OpenClock
T2 - 12th International IEEE Symposium on Precision Clock Synchronization for Measurement, Control, and Communication, ISPCS 2018
AU - Anwar, Fatima M.
AU - Alanwar, Amr
AU - Srivastava, Mani B.
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/11/21
Y1 - 2018/11/21
N2 - Clock synchronization protocols have always been tested and compared in controlled environments. The hardware variability of different platforms, and network variability in communication channels is often ignored. Most of the synchronization algorithms are not tested for faults, failures or adversarial attacks because it is hard to reproduce them on different devices. The presence of few clocks on a single device limits the use of one device to test multiple synchronization protocols at once. For fair comparison of multiple synchronization protocols, we assert that it is essential for their disciplinable clocks to be derived from the same clock hardware, and that they process the same network traffic. We propose OpenClock, a clock synchronization testbed that manages synchronization resources and provides multiple disciplinable clocks on a single platform. OpenClock features a rich set of clocks for modular and extensible design, and an attack simulator for testing algorithmic resilience. Users can leverage the attack capability to find vulnerabilities, and test the resilience of synchronization algorithms. We prototype OpenClock on an embedded platform and ×86 desktop. We evaluate variants of PTP and NTP protocols on the embedded platform under various clock parameters, disciplining mechanisms, and attack scenarios.
AB - Clock synchronization protocols have always been tested and compared in controlled environments. The hardware variability of different platforms, and network variability in communication channels is often ignored. Most of the synchronization algorithms are not tested for faults, failures or adversarial attacks because it is hard to reproduce them on different devices. The presence of few clocks on a single device limits the use of one device to test multiple synchronization protocols at once. For fair comparison of multiple synchronization protocols, we assert that it is essential for their disciplinable clocks to be derived from the same clock hardware, and that they process the same network traffic. We propose OpenClock, a clock synchronization testbed that manages synchronization resources and provides multiple disciplinable clocks on a single platform. OpenClock features a rich set of clocks for modular and extensible design, and an attack simulator for testing algorithmic resilience. Users can leverage the attack capability to find vulnerabilities, and test the resilience of synchronization algorithms. We prototype OpenClock on an embedded platform and ×86 desktop. We evaluate variants of PTP and NTP protocols on the embedded platform under various clock parameters, disciplining mechanisms, and attack scenarios.
UR - http://www.scopus.com/inward/record.url?scp=85059761347&partnerID=8YFLogxK
U2 - 10.1109/ISPCS.2018.8543080
DO - 10.1109/ISPCS.2018.8543080
M3 - Conference contribution
AN - SCOPUS:85059761347
T3 - IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication, ISPCS
BT - ISPCS 2018 - International IEEE Symposium on Precision Clock Synchronization for Measurement, Control, and Communication, Proceedings
PB - IEEE Computer Society
Y2 - 30 September 2018 through 5 October 2018
ER -