TY - GEN
T1 - On self-verifying DSL generation for embedded systems automation
AU - Han, Zhao
AU - Qazi, Shahzaib
AU - Werner, Michael
AU - Devarajegowda, Keerthikumara
AU - Ecker, Wolfgang
N1 - Publisher Copyright:
© VDE VERLAG GMBH ∙ Berlin ∙ Offenbach
PY - 2021
Y1 - 2021
N2 - As various domain knowledge is prerequired, the embedded systems development is difficult. In the development process, multiple programming languages are used to develop different aspects such as hardware, firmware and formal verification. The semantic gap and inconsistent syntax among these languages escalate further the design efforts. We propose to generate Python-embedded Self-Verifying Domain-Specific Languages (DSLs) from metamodels. Domain-specific semantics are captured in metamodels. With additional configurations, domain-specific functionalities are included in DSLs. Further, tests are generated to assure the DSL quality. To demonstrate the applicability, the proposed approach is applied on an embedded system automation framework that generates hardware, firmware and formal properties for verification. An SoC was generated and verified with the automation framework. Minimal efforts were observed to achieve high code coverage for DSLs. Furthermore, our approach scales well with increasing domain complexity, i.e., the generation took less than 10 seconds for the most complex DSL (129.9k Lines of Code).
AB - As various domain knowledge is prerequired, the embedded systems development is difficult. In the development process, multiple programming languages are used to develop different aspects such as hardware, firmware and formal verification. The semantic gap and inconsistent syntax among these languages escalate further the design efforts. We propose to generate Python-embedded Self-Verifying Domain-Specific Languages (DSLs) from metamodels. Domain-specific semantics are captured in metamodels. With additional configurations, domain-specific functionalities are included in DSLs. Further, tests are generated to assure the DSL quality. To demonstrate the applicability, the proposed approach is applied on an embedded system automation framework that generates hardware, firmware and formal properties for verification. An SoC was generated and verified with the automation framework. Minimal efforts were observed to achieve high code coverage for DSLs. Furthermore, our approach scales well with increasing domain complexity, i.e., the generation took less than 10 seconds for the most complex DSL (129.9k Lines of Code).
KW - Domain-Specific Language Generation
KW - Electronic Design Automation
KW - Metamodeling
KW - Quality Assurance
UR - http://www.scopus.com/inward/record.url?scp=85117448967&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85117448967
T3 - MBMV 2021: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen - 24. Workshop
SP - 124
EP - 130
BT - MBMV 2021
PB - VDE VERLAG GMBH
T2 - 24. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2021 - 24th Workshop on Methods and Description Languages for the Modeling and Verification of Circuits and Systems, MBMV 2021
Y2 - 18 March 2021 through 19 March 2021
ER -