Non-linear gate length dependence of on-current in Si-Nanowire FETs

W. M. Weber, A. P. Graham, G. S. Duesberg, M. Liebau, C. Cheze, L. Geelhaar, E. Unger, W. Pamler, W. Hoenlein, H. Riechert, F. Kreupl, P. Lugli

Publikation: Beitrag in Buch/Bericht/KonferenzbandKonferenzbeitragBegutachtung

10 Zitate (Scopus)

Abstract

An extensive gate-length (LG) dependent electrical characterization of silicon nanowire (NW) field effect transistors (FET) is presented here. Catalytically-grown and nominally undoped Si-NWs were integrated as the active region of FETs, upon which fully silicided Schottky source and drain contacts were fabricated. The length of the active region was shortened by a desired value, through the lateral self-aligned formation of nickel silicide source- and drain-segments. All Si-NW FETs consisting of a single Si-NW with diameters between 10 and 30 nm display p-type behaviour and on/off-current ratios of up to 107. Devices with LGs below 1 μm and 21 nm NW-diameters all show the same on currents around 1 μA at 1 V drain-source biases. For LG > 1 μm the on-current decreases exponentially with increasing LG.

OriginalspracheEnglisch
TitelESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference
Herausgeber (Verlag)IEEE Computer Society
Seiten423-426
Seitenumfang4
ISBN (Print)1424403014, 9781424403011
DOIs
PublikationsstatusVeröffentlicht - 2006
Extern publiziertJa
VeranstaltungESSDERC 2006 - 36th European Solid-State Device Research Conference - Montreux, Schweiz
Dauer: 19 Sept. 200621 Sept. 2006

Publikationsreihe

NameESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference
Band2006-January

Konferenz

KonferenzESSDERC 2006 - 36th European Solid-State Device Research Conference
Land/GebietSchweiz
OrtMontreux
Zeitraum19/09/0621/09/06

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