TY - GEN
T1 - MetaFS
T2 - 35th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2022
AU - Kaja, Endri
AU - Gerlin, Nicolas
AU - Bora, Monideep
AU - Devarajegowda, Keerthikumara
AU - Stoffel, Dominik
AU - Kunz, Wolfgang
AU - Ecker, Wolfgang
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - The adoption of new technologies by the automotive industry drives the need for electronic component suppliers to assess and scrutinize the risk of technologies that are being integrated into the safety-critical systems. To cope with these challenges, engineers are constantly looking for highly automated and efficient functional safety approaches to achieve the required certifications for their designs. In this paper, we propose MetaFS, a metamodel-based simulator-independent fault simulation framework that provides multi-purpose fault injection strategies such as statistical fault injection, direct fault injection, and exhaustive fault injection. The framework enables the injection of stuck-at faults, single-event transients, single-event upsets as well as timing faults. The proposed approach scales to a wide range of RISC-V based CPU subsystems with support for various RISC-V ISA standard extensions and, additional safety and security related custom instruction extensions. The subsystems were running the Dhrystone application and a specific in-house Fingerprint calculation application respectively. A minimal effort of 1 person-day was required to conduct 22 different fault simulation campaigns, providing significant data regarding subsystem failure rates.
AB - The adoption of new technologies by the automotive industry drives the need for electronic component suppliers to assess and scrutinize the risk of technologies that are being integrated into the safety-critical systems. To cope with these challenges, engineers are constantly looking for highly automated and efficient functional safety approaches to achieve the required certifications for their designs. In this paper, we propose MetaFS, a metamodel-based simulator-independent fault simulation framework that provides multi-purpose fault injection strategies such as statistical fault injection, direct fault injection, and exhaustive fault injection. The framework enables the injection of stuck-at faults, single-event transients, single-event upsets as well as timing faults. The proposed approach scales to a wide range of RISC-V based CPU subsystems with support for various RISC-V ISA standard extensions and, additional safety and security related custom instruction extensions. The subsystems were running the Dhrystone application and a specific in-house Fingerprint calculation application respectively. A minimal effort of 1 person-day was required to conduct 22 different fault simulation campaigns, providing significant data regarding subsystem failure rates.
KW - Model-driven fault simulation
KW - Safety analysis
UR - http://www.scopus.com/inward/record.url?scp=85143755015&partnerID=8YFLogxK
U2 - 10.1109/DFT56152.2022.9962369
DO - 10.1109/DFT56152.2022.9962369
M3 - Conference contribution
AN - SCOPUS:85143755015
T3 - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT
BT - Proceedings - 35th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2022
A2 - Cassano, Luca
A2 - Chakravarty, Sreejit
A2 - Bosio, Alberto
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 19 October 2022 through 21 October 2022
ER -