Memory access reconstruction based on memory allocation mechanism for source-level simulation of embedded software

Publikation: Beitrag in Buch/Bericht/KonferenzbandKonferenzbeitragBegutachtung

10 Zitate (Scopus)

Abstract

To date, there still lacks a way to accurately simulate data memory accesses in source-level simulation (SLS) of host-compiled embedded SW. The difficulty lies in that the accessed addresses for the load and store instructions can not be statically determined. Without knowing those addresses, the source code can not be annotated appropriately for data cache simulation. In this paper, we show an approach that is capable of resolving the accessed memory addresses based on the memory allocation mechanism. Applying this approach, the source code can be annotated to perform precise data cache simulation. The novelty of our methodology is that it is the first of its kind to take the memory allocation mechanism into account and thus can handle all the stack, data, heap and text sections. Moreover, a method is also proposed to handle pointer dereferences. In experiments, SLS with our approach yields almost identical cache miss rate and pattern when compared to the reference simulation.

OriginalspracheEnglisch
Titel2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Seiten729-734
Seitenumfang6
DOIs
PublikationsstatusVeröffentlicht - 2013
Veranstaltung2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 - Yokohama, Japan
Dauer: 22 Jan. 201325 Jan. 2013

Publikationsreihe

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Konferenz

Konferenz2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Land/GebietJapan
OrtYokohama
Zeitraum22/01/1325/01/13

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