Influence of Mosfet I-V Characteristics on Switching Delay Time of Cmos Inverters After Hot-Carrier Stress

In this paper, the relationship between hot-carrier degradation in MOSFET's and CMOS inverters is studied. We find that the device degradation characterized at the widely used bias points correlates poorly with the inverter degradation. We propose the use of new bias points that are more meaningful for circuit performance. Furthermore, a simple equation to calculate the degradation of the propagation delay is developed.