TY - GEN
T1 - FPGANeedle
T2 - 28th Asia and South Pacific Design Automation Conference, ASP-DAC 2023
AU - Gross, Mathieu
AU - Krautter, Jonas
AU - Gnad, Dennis
AU - Gruber, Michael
AU - Sigl, Georg
AU - Tahoori, Mehdi
N1 - Publisher Copyright:
© 2023 Copyright held by the owner/author(s).
PY - 2023/1/16
Y1 - 2023/1/16
N2 - FPGA as general-purpose accelerators can greatly improve system efficiency and performance in cloud and edge devices alike. However, they have recently become the focus of remote attacks, such as fault and side-channel attacks from one to another user of a part of the FPGA fabric. In this work, we consider system-on-chip platforms, where an FPGA and an embedded processor core are located on the same die. We show that the embedded processor core is vulnerable to voltage drops generated by the FPGA logic. Our experiments demonstrate the possibility of compromising the data transfer from external DDR memory to the processor cache hierarchy. Furthermore, we were also able to fault and skip instructions executed on an ARM Cortex-A9 core. The FPGA based fault injection is shown precise enough to recover the secret key of an AES T-tables implementation found in the mbedTLS library.
AB - FPGA as general-purpose accelerators can greatly improve system efficiency and performance in cloud and edge devices alike. However, they have recently become the focus of remote attacks, such as fault and side-channel attacks from one to another user of a part of the FPGA fabric. In this work, we consider system-on-chip platforms, where an FPGA and an embedded processor core are located on the same die. We show that the embedded processor core is vulnerable to voltage drops generated by the FPGA logic. Our experiments demonstrate the possibility of compromising the data transfer from external DDR memory to the processor cache hierarchy. Furthermore, we were also able to fault and skip instructions executed on an ARM Cortex-A9 core. The FPGA based fault injection is shown precise enough to recover the secret key of an AES T-tables implementation found in the mbedTLS library.
KW - FPGA-SoC
KW - differential fault attack
KW - on-chip fault attack
KW - voltage drop
UR - http://www.scopus.com/inward/record.url?scp=85148486279&partnerID=8YFLogxK
U2 - 10.1145/3566097.3568352
DO - 10.1145/3566097.3568352
M3 - Conference contribution
AN - SCOPUS:85148486279
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 358
EP - 364
BT - ASP-DAC 2023 - 28th Asia and South Pacific Design Automation Conference, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 16 January 2023 through 19 January 2023
ER -