Exact Mapping of Quantum Circuit Partitions to Building Blocks of the SAQIP Architecture

Amirmohammad Biuki, Naser Mohammadzadeh, Robert Wille, Sahar Sargaran

Publikation: Beitrag in Buch/Bericht/KonferenzbandKonferenzbeitragBegutachtung

2 Zitate (Scopus)

Abstract

Quantum computing benefits from collective features of quantum states, such as superposition and entanglement, to efficiently address problems that are very hard to be solved on classical systems. The Scalable Architecture for Quantum Information Processor (SAQIP) architecture is a promising technology that is based on ion-traps and realizes a hybrid composed of a large number of full-custom building blocks (supposed to realize so-called Elementary Logic Units; ELUs) connected by a reconfigurable optical switch network. As with every architecture, corresponding design methods are required in order to properly map a given quantum functionality onto the respective device. However, since the corresponding complexity frequently made exact solutions for this task infeasible for past architectures, most of the existing mapping methods rely on heuristics and, hence, do not provide exact/optimal results. Considering the SAQIP architecture, however, this problem can be prevented. In fact, due to the building blocks of this architecture, any circuit to be mapped has to be partitioned into ELUs anyway. Since those are usually of moderate size, exact/optimal solutions for them are possible. In this work, we sketch an exact mapping method that can generate such optimal results. To this end, we propose a corresponding formulation in mixed-integer linear programming (MILP) that allows to cope with the (smaller, but still not non-trivial) complexity.

OriginalspracheEnglisch
TitelProceedings - 2022 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022
Herausgeber (Verlag)IEEE Computer Society
Seiten402-405
Seitenumfang4
ISBN (elektronisch)9781665466059
DOIs
PublikationsstatusVeröffentlicht - 2022
Veranstaltung2022 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022 - Pafos, Zypern
Dauer: 4 Juli 20226 Juli 2022

Publikationsreihe

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Band2022-July
ISSN (Print)2159-3469
ISSN (elektronisch)2159-3477

Konferenz

Konferenz2022 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022
Land/GebietZypern
OrtPafos
Zeitraum4/07/226/07/22

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