TY - GEN
T1 - Efficient Software-Implemented HW Fault Tolerance for TinyML Inference in Safety-critical Applications
AU - Sharif, Uzair
AU - Mueller-Gritschneder, Daniel
AU - Stahl, Rafael
AU - Schlichtmann, Ulf
N1 - Publisher Copyright:
© 2023 EDAA.
PY - 2023
Y1 - 2023
N2 - TinyML research has mainly focused on optimizing neural network inference in terms of latency, code-size and energy-use for efficient execution on low-power micro-controller units (MCUs). However, distinctive design challenges emerge in safety-critical applications, for example in small unmanned autonomous vehicles such as drones, due to the susceptibility of off-the-shelf MCU devices to soft-errors. We propose three new techniques to protect TinyML inference against random soft errors with the target to reduce run-time overhead: one for protecting fully-connected layers; one adaptation of existing algorithmic fault tolerance techniques to depth-wise convolutions; and an efficient technique to protect the so-called epilogues within TinyML layers. Integrating these layer-wise methods, we derive a full-inference hardening solution for TinyML that achieves run-time efficient soft-error resilience. We evaluate our proposed solution on MLPerf-Tiny benchmarks. Our experimental results show that competitive resilience can be achieved compared with currently available methods, while reducing run-time overheads by 120% for one fully-connected neural network (NN); 20% for the two CNNs with depth-wise convolutions; and 2% for standard CNN. Additionally, we propose selective hardening which reduces the incurred run-time overhead further by 2x for the studied CNNs by focusing exclusively on avoiding mispredictions.
AB - TinyML research has mainly focused on optimizing neural network inference in terms of latency, code-size and energy-use for efficient execution on low-power micro-controller units (MCUs). However, distinctive design challenges emerge in safety-critical applications, for example in small unmanned autonomous vehicles such as drones, due to the susceptibility of off-the-shelf MCU devices to soft-errors. We propose three new techniques to protect TinyML inference against random soft errors with the target to reduce run-time overhead: one for protecting fully-connected layers; one adaptation of existing algorithmic fault tolerance techniques to depth-wise convolutions; and an efficient technique to protect the so-called epilogues within TinyML layers. Integrating these layer-wise methods, we derive a full-inference hardening solution for TinyML that achieves run-time efficient soft-error resilience. We evaluate our proposed solution on MLPerf-Tiny benchmarks. Our experimental results show that competitive resilience can be achieved compared with currently available methods, while reducing run-time overheads by 120% for one fully-connected neural network (NN); 20% for the two CNNs with depth-wise convolutions; and 2% for standard CNN. Additionally, we propose selective hardening which reduces the incurred run-time overhead further by 2x for the studied CNNs by focusing exclusively on avoiding mispredictions.
KW - TinyML
KW - error detection
KW - safety
KW - soft-error
UR - https://www.scopus.com/pages/publications/85162720560
U2 - 10.23919/DATE56975.2023.10137207
DO - 10.23919/DATE56975.2023.10137207
M3 - Conference contribution
AN - SCOPUS:85162720560
T3 - Proceedings -Design, Automation and Test in Europe, DATE
BT - 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023
Y2 - 17 April 2023 through 19 April 2023
ER -