Analog fault simulation automation at schematic level with random sampling techniques

Liang Wu, Mohammad Khizer Hussain, Saed Abughannam, Wolfgang Muller, Christoph Scheytt, Wolfgang Ecker

Publikation: Beitrag in Buch/Bericht/KonferenzbandKonferenzbeitragBegutachtung

3 Zitate (Scopus)

Abstract

This paper presents an approach for analog fault effect simulation automation based on random fault selection with a high fault coverage of the circuit under test by means of fault injection and simulation based on advanced sampling techniques. The random fault selection utilizes the likelihood of the fault occurrence of different electrical components in the circuit with a confidence level. Defect models of different devices are analyzed for the calculation of the fault probability. A case study with our implemented tool demonstrates that likelihood calculation and fault simulation provides means for efficient fault effect simulation automation.

OriginalspracheEnglisch
TitelProceedings - 2018 13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers Inc.
Seiten1-4
Seitenumfang4
ISBN (elektronisch)9781538652916
DOIs
PublikationsstatusVeröffentlicht - 29 Mai 2018
Extern publiziertJa
Veranstaltung13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018 - Taormina, Italien
Dauer: 10 Apr. 201812 Apr. 2018

Publikationsreihe

NameProceedings - 2018 13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018

Konferenz

Konferenz13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018
Land/GebietItalien
OrtTaormina
Zeitraum10/04/1812/04/18

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