TY - GEN
T1 - A Real-Time virtio-based Framework for Predictable Inter-VM Communication
AU - Schwäricke, Gero
AU - Tabish, Rohan
AU - Pellizzoni, Rodolfo
AU - Mancuso, Renato
AU - Bastoni, Andrea
AU - Zuepke, Alexander
AU - Caccamo, Marco
N1 - Publisher Copyright:
© 2021 IEEE
PY - 2021
Y1 - 2021
N2 - Ensuring real-time properties on current heterogeneous multiprocessor systems on a chip is a challenging task. Furthermore, online artificial intelligent applications –which are routinely deployed on such chips– pose increasing pressure on the memory subsystem that becomes a source of unpredictability. Although techniques have been proposed to restore independent access to memory for concurrently executing virtual machines (VM), providing predictable inter-VM communication remains challenging. In this work, we tackle the problem of predictably transferring data between virtual machines and virtualized hardware resources on multiprocessor systems on chips under consideration of memory interference. We design a “broker-based” real-time communication framework for otherwise isolated virtual machines, provide a virtio-based reference implementation on top of the Jailhouse hypervisor, assess its overheads for FreeRTOS virtual machines, and formally analyze its communication flow schedulability under consideration of the implementation overheads. Furthermore, we define a methodology to assess the maximum DRAM memory saturation empirically, evaluate the framework’s performance and compare it with the theoretical schedulability.
AB - Ensuring real-time properties on current heterogeneous multiprocessor systems on a chip is a challenging task. Furthermore, online artificial intelligent applications –which are routinely deployed on such chips– pose increasing pressure on the memory subsystem that becomes a source of unpredictability. Although techniques have been proposed to restore independent access to memory for concurrently executing virtual machines (VM), providing predictable inter-VM communication remains challenging. In this work, we tackle the problem of predictably transferring data between virtual machines and virtualized hardware resources on multiprocessor systems on chips under consideration of memory interference. We design a “broker-based” real-time communication framework for otherwise isolated virtual machines, provide a virtio-based reference implementation on top of the Jailhouse hypervisor, assess its overheads for FreeRTOS virtual machines, and formally analyze its communication flow schedulability under consideration of the implementation overheads. Furthermore, we define a methodology to assess the maximum DRAM memory saturation empirically, evaluate the framework’s performance and compare it with the theoretical schedulability.
UR - http://www.scopus.com/inward/record.url?scp=85124571167&partnerID=8YFLogxK
U2 - 10.1109/RTSS52674.2021.00015
DO - 10.1109/RTSS52674.2021.00015
M3 - Conference contribution
AN - SCOPUS:85124571167
T3 - Proceedings - Real-Time Systems Symposium
SP - 27
EP - 40
BT - Proceedings - 2021 IEEE 42nd Real-Time Systems Symposium, RTSS 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 42nd IEEE Real-Time Systems Symposium, RTSS 2021
Y2 - 7 December 2021 through 10 December 2021
ER -