TY - GEN
T1 - A Model-Driven Architecture Approach to Efficient and Adaptable Software Code Generation
AU - Bhadra, Mayuri
AU - Albert, Daniel
AU - Yun, Ungsang
AU - Kunzelmann, Robert
AU - Lopera, Daniela Sanchez
AU - Ecker, Wolfgang
N1 - Publisher Copyright:
© MBMV 2024. All rights reserved.
PY - 2024
Y1 - 2024
N2 - In the evolving domain of embedded programming, addressing diverse challenges of resource constraints, reliability, and hardware dependencies is essential. To overcome these hurdles, we propose an efficient and adaptable model-based code generator aligned with Model-Driven Architecture (MDA) principles. This generator offers an alternative to the traditional manual coding approach, which is often laborious and error-prone. Our proposed solution emphasizes adaptability and efficiency by seamlessly integrating with different languages and target hardware architectures while incorporating high-level programming constructs like intrinsics and/or inline assembly. Applying our model-based code generator to generate kernel libraries for neural network (NN) inference showcases its adaptability, serving both high-performance systems like CPUs and tinyML targets such as RISC-V microcontroller units (MCUs). Our proposed solution’s efficiency is shown by incorporating intrinsic functions and generating different variants of NN kernel libraries for fundamental tensor math operators. Experimental results indicate an average reduction of approximately 126 times in Source Lines of Code (SLoC) when using our model-driven approach compared to the SLoC for the generated code of all possible variants according to the different attributes modeled for the respective operators and target hardware platforms. This highlights the efficiency and adaptability of our proposed solution in reducing the overall development effort and enhancing the development of generic embedded software.
AB - In the evolving domain of embedded programming, addressing diverse challenges of resource constraints, reliability, and hardware dependencies is essential. To overcome these hurdles, we propose an efficient and adaptable model-based code generator aligned with Model-Driven Architecture (MDA) principles. This generator offers an alternative to the traditional manual coding approach, which is often laborious and error-prone. Our proposed solution emphasizes adaptability and efficiency by seamlessly integrating with different languages and target hardware architectures while incorporating high-level programming constructs like intrinsics and/or inline assembly. Applying our model-based code generator to generate kernel libraries for neural network (NN) inference showcases its adaptability, serving both high-performance systems like CPUs and tinyML targets such as RISC-V microcontroller units (MCUs). Our proposed solution’s efficiency is shown by incorporating intrinsic functions and generating different variants of NN kernel libraries for fundamental tensor math operators. Experimental results indicate an average reduction of approximately 126 times in Source Lines of Code (SLoC) when using our model-driven approach compared to the SLoC for the generated code of all possible variants according to the different attributes modeled for the respective operators and target hardware platforms. This highlights the efficiency and adaptability of our proposed solution in reducing the overall development effort and enhancing the development of generic embedded software.
KW - Code generation
KW - Model-Driven Architecture
KW - Model-of-Software
KW - metamodeling
UR - http://www.scopus.com/inward/record.url?scp=85192983177&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85192983177
T3 - MBMV 2024: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen - 27. Workshop
SP - 196
EP - 203
BT - MBMV 2024
PB - VDE VERLAG GMBH
T2 - 27. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2024 - 27th Workshop on Methods and Description Languages ??for Modeling and Verification of Circuits and Systems, MBMV 2024
Y2 - 14 February 2024 through 15 February 2024
ER -